GS880Z18-V GSI [GSI Technology], GS880Z18-V Datasheet - Page 9
GS880Z18-V
Manufacturer Part Number
GS880Z18-V
Description
9Mb Pipelined and Flow Through Synchronous NBT SRAM
Manufacturer
GSI [GSI Technology]
Datasheet
1.GS880Z18-V.pdf
(24 pages)
- Current page: 9 of 24
- Download datasheet (934Kb)
Rev: 1.03 6/2006
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Key
Current State and Next State Definition for
Current State (n)
Clock (CK)
Command
ƒ
Transition
Input Command Code
B
R
Pipeline and Flow Through Read Write Control State Diagram
Current State
Burst Read
New Read
Next State (n+1)
R
n
D
B
ƒ
D
W
R
Pipeline and Flow Through Read/Write Control State Diagram
n+1
Next State
W
9/24
D
Deselect
ƒ
B
R
Notes:
1. The Hold command (CKE Low) is not
2. W, R, B and D represent input command
n+2
shown because it prevents any state change.
codes ,as indicated in the Synchronous Truth Table.
R
D
Burst Write
ƒ
New Write
W
D
B
n+3
GS880Z18/32/36BT-xxxV
W
ƒ
B
© 2001, GSI Technology
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