GS8642ZV18B-200I GSI [GSI Technology], GS8642ZV18B-200I Datasheet - Page 7

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GS8642ZV18B-200I

Manufacturer Part Number
GS8642ZV18B-200I
Description
72Mb Pipelined and Flow Through Synchronous NBT SRAM
Manufacturer
GSI [GSI Technology]
Datasheet
Rev: 1.02 5/2005
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS8642ZV18/36 119-Bump BGA Pin Description
B
A
Symbol
, B
A
V
CKE
ADV
TMS
TDO
DQ
DQ
DQ
DQ
LBO
TCK
V
TDI
V
B
0
NC
CK
ZQ
An
ZZ
E
E
E
FT
DDQ
W
G
, B
, A
DD
SS
1
3
2
A
B
C
D
1
C
, B
D
Type
I/O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Low = Low Impedance [High Drive], High = High Impedance [Low Drive])
Byte Write Enable for DQ
7/32
Address field LSBs and Address Counter Preset Inputs
Flow Through or Pipeline mode; active low
GS8642ZV18(B)/GS8642ZV36(B)/GS8642ZV72(C)
Burst address counter advance enable
FLXDrive Output Impedance Control
Linear Burst Order mode; active low
Sleep mode control; active high
Clock Input Signal; active high
Data Input and Output pins
Output driver power supply
Output Enable; active low
Clock Enable; active low
Chip Enable; active high
Write Enable; active low
Chip Enable; active low
Chip Enable; active low
Scan Test Mode Select
I/O and Core Ground
Scan Test Data Out
Core power supply
Scan Test Data In
Scan Test Clock
Address Inputs
Description
No Connect
A
, DQ
B
, DQ
C
, DQ
D
I/Os; active low
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© 2004, GSI Technology
BPR1999.05.18

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