GS8642Z18B GSI [GSI Technology], GS8642Z18B Datasheet - Page 3
GS8642Z18B
Manufacturer Part Number
GS8642Z18B
Description
72Mb Pipelined and Flow Through Synchronous NBT SRAM
Manufacturer
GSI [GSI Technology]
Datasheet
1.GS8642Z18B.pdf
(34 pages)
- Current page: 3 of 34
- Download datasheet (2Mb)
GS8642Z72 209-Bump BGA Pin Description
Rev: 1.02 5/2005
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
B
E
Symbol
, B
B
A
B
MCH
MCH
MCL
DQ
DQ
DQ
DQ
DQ
DQ
DQ
ADV
LBO
CKE
DQ
A
NC
CK
ZQ
0
An
C
ZZ
F
FT
E
E
E
W
G
, A
, B
, B
,B
1
3
2
C
D
G
H
A
B
E
F
D
1
B
G
,B
H
Type
I/O
—
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Byte Write Enable for DQ
3/34
Address field LSBs and Address Counter Preset Inputs
Byte Write Enable for DQ
Byte Write Enable for DQ
Flow Through or Pipeline mode; active low
Burst address counter advance enable
FLXDrive Output Impedance Control
Linear Burst Order mode; active low
Low = Low Impedance [High Drive],
High = High Impedance [Low Drive]
Sleep Mode control; active high
Clock Input Signal; active high
GS8642Z18(B)/GS8642Z36(B)/GS8642Z72(C)
Data Input and Output pins
Output Enable; active low
Chip Enable; active high
Clock Enable; active low
Write Enable; active low
Chip Enable; active low
Chip Enable; active low
Must Connect High
Must Connect High
Must Connect Low
Description
Address Inputs
No Connect
E
, DQ
C
A
F
, DQ
, DQ
, DQ
G
B
D
, DQ
I/Os; active low
I/Os; active low
H
I/Os; active low
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© 2004, GSI Technology
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