GS880E18AT GSI [GSI Technology], GS880E18AT Datasheet - Page 11

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GS880E18AT

Manufacturer Part Number
GS880E18AT
Description
512K x 18, 256K x 32, 256K x 36 9Mb Synchronous Burst SRAMs
Manufacturer
GSI [GSI Technology]
Datasheet
Notes:
1.
2.
3.
Rev: 1.03 11/2004
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
The diagram shows supported (tested) synchronous state transitions plus supported transitions that depend upon the use of G.
Use of “Dummy Reads” (Read Cycles with G High) may be used to make the transition from Read cycles to Write cycles without passing
through a Deselect cycle. Dummy Read cycles increment the address counter just like normal read cycles.
Transitions shown in gray tone assume G has been pulsed high long enough to turn the RAM’s drivers off and for incoming data to meet
Data Input Set Up Time.
X
X
CW
First Write
Burst Write
Simplified State Diagram with G
W
W
CW
11/24
W
CR
R
CR
R
Deselect
X
GS880E18/32/36AT-250/225/200/166/150/133
CW
W
CW
W
R
CR
First Read
Burst Read
R
R
CR
X
X
© 2001, GSI Technology

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