EDI88512CAXB32B WEDC [White Electronic Designs Corporation], EDI88512CAXB32B Datasheet

no-image

EDI88512CAXB32B

Manufacturer Part Number
EDI88512CAXB32B
Description
512Kx8 Monolithic SRAM, SMD 5962-95600
Manufacturer
WEDC [White Electronic Designs Corporation]
Datasheet
512Kx8 Monolithic SRAM, SMD 5962-95600
FEATURES
White Electronic Designs Corp. reserves the right to change products or specifi cations without notice.
October 2004
Rev. 11
WE#
CS#
I/O0
I/O1
I/O2
I/O3
Vcc
Vss
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
Access Times of 15, 17, 20, 25, 35, 45, 55ns
Data Retention Function (LPA version)
TTL Compatible Inputs and Outputs
Fully Static, No Clocks
Organized as 512Kx8
Commercial, Industrial and Military Temperature Rang es
32 lead JEDEC Approved Evolutionary Pinout
• Ceramic Sidebrazed 600 mil DIP (Package 9)
• Ceramic Sidebrazed 400 mil DIP (Package 326)
• Ceramic 32 pin Flatpack (Package 344)
• Ceramic Thin Flatpack (Package 321)
• Ceramic SOJ (Package 140)
36 lead JEDEC Approved Revolutionary Pinout
• Ceramic Flatpack (Package 316)
• Ceramic SOJ (Package 327)
• Ceramic LCC (Package 502)
Single +5V (±10%) Supply Operation
10
11
12
13
14
15
16
17
18
1
2
3
4
5
6
7
8
9
FIG. 1
Revolutionary
TOP VIEW
36 pin
36 PIN
White Electronic Designs
PIN CONFIGURATION
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
NC
A18
A17
A16
A15
OE#
I/O7
I/O6
Vss
Vcc
I/O5
I/O4
A14
A13
A12
A11
A10
NC
I/O0
I/O1
I/O2
A18
A16
A14
A12
Vss
A7
A6
A5
A4
A3
A2
A1
A0
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
Evolutionary
TOP VIEW
32 pin
32 PIN
1
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
The EDI88512CA is a 4 megabit Monolithic CMOS
Stat ic RAM.
The 32 pin DIP pinout adheres to the JEDEC evo lu tion ary
stan dard for the four megabit device. All 32 pin packages
are pin for pin up grades for the single chip enable 128K
x 8, the EDI88128CS. Pins 1 and 30 be come the higher
order addresses.
The 36 pin revolutionary pinout also adheres to the
JEDEC stan dard for the four megabit device. The cen ter
pin power and ground pins help to reduce noise in high
performance systems. The 36 pin pinout also allows the
user an upgrade path to the future 2Mx8.
A Low Power version with Data Retention (EDI88512LPA)
is also available for battery backed applications. Military
product is available compliant to Appendix A of MIL-
PRF-38535.
*This product is subject to change without notice.
Vcc
A15
A17
WE#
A13
A8
A9
A11
OE#
A10
CS#
I/O7
I/O6
I/O5
I/O4
I/O3
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
A
WE#
CS#
OE#
0-18
I/O
A0
WE#
CS#
OE#
V
V
NC
PIN DESCRIPTION
Address
CC
SS
BLOCK DIAGRAM
Buffer
-18
0-7
Data Inputs/Outputs
Address Inputs
Write Enables
Chip Selects
Output Enable
Power (+5V ±10%)
Ground
Not Connected
Memory Array
Address
Decoder
EDI88512CA
Circuits
I/O
I/O
0-7

Related parts for EDI88512CAXB32B

EDI88512CAXB32B Summary of contents

Page 1

White Electronic Designs 512Kx8 Monolithic SRAM, SMD 5962-95600 FEATURES Access Times of 15, 17, 20, 25, 35, 45, 55ns Data Retention Function (LPA version) TTL Compatible Inputs and Outputs Fully Static, No Clocks Organized as 512Kx8 Commercial, Industrial and Military ...

Page 2

White Electronic Designs ABSOLUTE MAXIMUM RATINGS Parameter -0.5 ≤ T Voltage on any pin relative to Vss Operating Temperature T (Ambient) A Commercial -40 ≤ T Industrial -55 ≤ T Military -65 ≤ T Storage Temperature, Plastic Power Dissipation Output ...

Page 3

White Electronic Designs Symbol Parameter JEDEC Read Cycle Time t AVAV Address Access Time t AVQV Chip Enable Access Time t ELQV Chip Enable to Output in Low Z (1) t ELQX Chip Disable to Output in High Z (1) ...

Page 4

White Electronic Designs FIG. 2 TIMING WAVEFORM - READ CYCLE t AVAV ADDRESS ADDRESS 1 t AVQV DATA I/O READ CYCLE 1 (WE# HIGH; OE#, CS# LOW) FIG. 3 WRITE CYCLE - WE# CONTROLLED ADDRESS DATA IN DATA OUT FIG. ...

Page 5

White Electronic Designs DATA RETENTION CHARACTERISTICS (EDI88512LPA ONLY) Characteristic Low Power Version only Data Retention Voltage Data Retention Quiescent Current Chip Disable to Data Retention Time Operation Recovery Time FIG. 5 DATA RETENTION - CS# CONTROLLED V CC CS# White ...

Page 6

White Electronic Designs PACKAGE 9: 32 LEAD SIDEBRAZED CERAMIC DIP, SMD 5962-95600XXMXA 0.200 0.125 0.061 0.017 PACKAGE 326: 32 LEAD SIDEBRAZED CERAMIC DIP 0.200 0.125 PACKAGE 140: 32 LEAD CERAMIC SOJ, SMD 5962-95600XXMUA 0.840 0.820 White Electronic Designs Corp. reserves ...

Page 7

White Electronic Designs PACKAGE 316: 36 PIN CERAMIC FLATPACK, SMD 5962-95600XXMTA Pin 1 0.045 0.020 PACKAGE 321: 32 PIN THINPACK™ FLATPACK, SMD 5962-95600XXMYA PACKAGE 344: 32 PIN CERAMIC FLATPACK, SMD 5962-95600XXM9A 0.838 MAX. White Electronic Designs Corp. reserves the right ...

Page 8

White Electronic Designs PACKAGE 327: 36 LEAD CERAMIC SOJ, SMD 5962-95600XXMMA 0.920 0.940 PACKAGE 502: 36 LEAD CERAMIC LCC, SMD 5962-95600XXMNA (PENDING) 0.460 0.445 White Electronic Designs Corp. reserves the right to change products or specifi cations without notice. October ...

Page 9

White Electronic Designs ORDERING INFORMATION WHITE ELECTRONIC DESIGNS SRAM ORGANIZATION, 512Kx8 TECHNOLOGY CMOS Standard Power LPA = Low Power ACCESS TIME (ns) PACKAGE TYPE lead Sidebrazed DIP, 600 mil (Package lead ...

Related keywords