M391T6553BGZ0-CD5/CC SAMSUNG [Samsung semiconductor], M391T6553BGZ0-CD5/CC Datasheet - Page 2
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M391T6553BGZ0-CD5/CC
Manufacturer Part Number
M391T6553BGZ0-CD5/CC
Description
240pin Unbuffered Module based on 512Mb B-die 64/72-bit Non-ECC/ECC
Manufacturer
SAMSUNG [Samsung semiconductor]
Datasheet
1.M391T6553BGZ0-CD5CC.pdf
(22 pages)
Features
DDR2 Unbuffered DIMM Ordering Information
Note: “Z” of Part number(11th digit) stand for Lead-free products.
Note: “3” of Part number(12th digit) stand for Dummy Pad PCB products.
Address Configuration
256MB, 512MB, 1GB Unbuffered DIMMs
Note: For detailed DDR2 SDRAM operation, please refer to Samsung’s Device operation & Timing diagram.
• Performance range
• JEDEC standard 1.8V ± 0.1V Power Supply
• V
• 200 MHz f
• 4 Banks
• Posted CAS
• Programmable CAS Latency: 3, 4, 5
• Programmable Additive Latency: 0, 1 , 2 , 3 and 4
• Write Latency(WL) = Read Latency(RL) -1
• Burst Length: 4 , 8(Interleave/nibble sequential)
• Programmable Sequential / Interleave Burst Mode
• Bi-directional Differential Data-Strobe (Single-ended data-strobe is an optional feature)
• Off-Chip Driver(OCD) Impedance Adjustment
• On Die Termination
• Average Refresh Period 7.8us at lower than a T
• Package: 60ball FBGA - 64Mx8 , 84ball FBGA - 32Mx16
• All of Lead-free products are compliant for RoHS
M378T3354BG(Z)3-CD5/CC
M378T3354BG(Z)0-CD5/CC
M378T6553BG(Z)3-CD5/CC
M378T6553BG(Z)0-CD5/CC
M378T2953BG(Z)3-CD5/CC
M378T2953BG(Z)0-CD5/CC
M391T6553BG(Z)3-CD5/CC
M391T6553BG(Z)0-CD5/CC
M391T2953BG(Z)3-CD5/CC
M391T2953BG(Z)0-CD5/CC
-
32Mx16(512Mb) based Module
DDQ
64Mx8(512Mb) based Module
support High Temperature Self-Refresh rate enable feature
CL-tRCD-tRP
Speed@CL3
Speed@CL4
Speed@CL5
Part Number
= 1.8V ± 0.1V
Organization
CK
for 400Mb/sec/pin, 267MHz f
D5(DDR2-533)
4-4-4
400
533
Density
256MB
256MB
512MB
512MB
512MB
512MB
-
1GB
1GB
1GB
1GB
Row Address
CK
A0-A13
A0-A12
Organization
CC(DDR2-400)
for 533Mb/sec/pin
128Mx64
128Mx64
128Mx72
128Mx72
32Mx64
32Mx64
64Mx64
64Mx64
64Mx72
64Mx72
CASE
3-3-3
400
400
-
85°C, 3.9us at 85°C < T
x64 Non ECC
x72 ECC
Column Address
Mbps
Mbps
Mbps
Unit
CK
Component Composition
A0-A9
A0-A9
32Mx16(K4T51163QB)*4
32Mx16(K4T51163QB)*4
64Mx8(K4T51083QB)*16
64Mx8(K4T51083QB)*16
64Mx8(K4T51083QB)*18
64Mx8(K4T51083QB)*18
64Mx8(K4T51083QB)*8
64Mx8(K4T51083QB)*8
64Mx8(K4T51083QB)*9
64Mx8(K4T51083QB)*9
CASE
< 95 °C
Bank Address
BA0-BA1
BA0-BA1
Rev. 1.5 Aug. 2005
Number of Rank
DDR2 SDRAM
1
1
1
1
2
2
1
1
2
2
Auto Precharge
A10
A10
Height
30mm
30mm
30mm
30mm
30mm
30mm
30mm
30mm
30mm
30mm