M391T6553BGZ0-CD5/CC SAMSUNG [Samsung semiconductor], M391T6553BGZ0-CD5/CC Datasheet

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M391T6553BGZ0-CD5/CC

Manufacturer Part Number
M391T6553BGZ0-CD5/CC
Description
240pin Unbuffered Module based on 512Mb B-die 64/72-bit Non-ECC/ECC
Manufacturer
SAMSUNG [Samsung semiconductor]
Datasheet
256MB, 512MB, 1GB Unbuffered DIMMs
DDR2 Unbuffered SDRAM MODULE
sINFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS,
AND IS SUBJECT TO CHANGE WITHOUT NOTICE.
NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE,
EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE,
TO ANY INTELLECTUAL PROPERTY RIGHTS IN SAMSUNG PRODUCTS OR TECHNOLOGY. ALL
INFORMATION IN THIS DOCUMENT IS PROVIDED
ON AS "AS IS" BASIS WITHOUT GUARANTEE OR WARRANTY OF ANY KIND.
1. For updates or additional information about Samsung products, contact your nearest Samsung office.
2. Samsung products are not intended for use in life support, critical care, medical, safety equipment, or similar
applications where Product failure couldresult in loss of life or personal or physical harm, or any military or
defense application, or any governmental procurement to which special terms or provisions may apply.
240pin Unbuffered Module based on 512Mb B-die
* Samsung Electronics reserves the right to change products or specification without notice.
64/72-bit Non-ECC/ECC
Rev. 1.5 Aug. 2005
DDR2 SDRAM

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M391T6553BGZ0-CD5/CC Summary of contents

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... Unbuffered DIMMs DDR2 Unbuffered SDRAM MODULE 240pin Unbuffered Module based on 512Mb B-die sINFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IN SAMSUNG PRODUCTS OR TECHNOLOGY. ALL INFORMATION IN THIS DOCUMENT IS PROVIDED ON AS " ...

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... Package: 60ball FBGA - 64Mx8 , 84ball FBGA - 32Mx16 • All of Lead-free products are compliant for RoHS Note: For detailed DDR2 SDRAM operation, please refer to Samsung’s Device operation & Timing diagram. Address Configuration Organization 64Mx8(512Mb) based Module 32Mx16(512Mb) based Module Organization Component Composition x64 Non ECC 32Mx64 32Mx16(K4T51163QB)*4 ...

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... SS 30 DQ18 150 DQ23 Connect, RFU = Reserved for Future Use 1. Pin196(A13) is used for x4/x8 base Unbuffered DIMM. 2. The TEST pin is reserved for bus analysis tools and is not connected on standard memory module products (DIMMs.) Front Pin Back Pin Front DQ19 151 V 61 ...

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... DQ23 Connect, RFU = Reserved for Future Use 1. Pin196(A13) is used for x4/x8 base Unbuffered DIMM. 2. The TEST pin is reserved for bus analysis tools and is not connected on standard memory module products (DIMMs.) Pin Description Pin Name Description A0-A13 DDR2 SDRAM address bus ...

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... Power and ground for DDR2 SDRAM input buffers, and core logic. VDD and VDDQ pins are tied Supply these modules. DQS0-DQS8 Data strobe for input and output data. For Rawcards using x16 orginized DRAMs DQ0-7 connect to the LDQS pin of In/Out DQS0-DQS8 the DRAMs and DQ8-17 connect to the UDQS pin of the DRAM ...

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... Unbuffered DIMMs Functional Block Diagram: 512MB, 64Mx64 Module S0 DQS0 DQS0 DM0 DM CS DQS DQS DQ0 I/O 0 DQ1 D0 I/O 1 DQ2 I/O 2 DQ3 I/O 3 DQ4 I/O 4 DQ5 I/O 5 DQ6 I/O 6 DQ7 I/O 7 DQS1 DQS1 DM1 DM CS DQS DQS DQ8 I/O 0 DQ9 I DQ10 I/O 2 DQ11 I/O 3 DQ12 I/O 4 DQ13 I/O 5 DQ14 I/O 6 DQ15 ...

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... Unbuffered DIMMs Functional Block Diagram: 512MB, 64Mx72 ECC Module S0 DQS0 DQS0 DM0 DM CS DQS DQS DQ0 I/O 0 DQ1 D0 I/O 1 DQ2 I/O 2 DQ3 I/O 3 DQ4 I/O 4 DQ5 I/O 5 DQ6 I/O 6 DQ7 I/O 7 DQS1 DQS1 DM1 DM CS DQS DQS DQ8 I/O 0 DQ9 I DQ10 I/O 2 DQ11 I/O 3 DQ12 I/O 4 DQ13 I/O 5 DQ14 ...

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... Unbuffered DIMMs Functional Block Diagram: 1GB, 128Mx64 Module S1 S0 DQS0 DQS0 DM0 DM CS DQS DQS DQ0 I/O 0 DQ1 I DQ2 I/O 2 DQ3 I/O 3 DQ4 I/O 4 DQ5 I/O 5 DQ6 I/O 6 DQ7 I/O 7 DQS1 DQS1 DM1 DM CS DQS DQS DQ8 I/O 0 DQ9 I DQ10 I/O 2 DQ11 I/O 3 DQ12 I/O 4 DQ13 I/O 5 DQ14 ...

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... Unbuffered DIMMs Functional Block Diagram: 1GB, 128Mx72 ECC Module S1 S0 DQS0 DQS0 DM0 DM CS DQS DQS DQ0 I/O 0 DQ1 I DQ2 I/O 2 DQ3 I/O 3 DQ4 I/O 4 DQ5 I/O 5 DQ6 I/O 6 DQ7 I/O 7 DQS1 DQS1 DM1 DM CS DQS DQS DQ8 I/O 0 DQ9 I DQ10 I/O 2 DQ11 I/O 3 DQ12 I/O 4 DQ13 ...

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... Unbuffered DIMMs Functional Block Diagram: 256MB, 32Mx64 Module DQS1 DQS1 DM1 DQS0 DQS0 DM0 DQS3 DQS3 DM3 DQS2 DQS2 DM2 Serial PD SCL SA0 SA1 SA2 BA0 - BA1 BA0-BA1 : DDR2 SDRAMs A12 A0-A12 : DDR2 SDRAMs ...

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Unbuffered DIMMs Absolute Maximum DC Ratings Symbol Parameter Voltage on V pin relative Voltage on V pin relative DDQ DDQ Voltage on V pin relative DDL ...

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Unbuffered DIMMs Operating Temperature Condition Symbol TOPER Operating Temperature Note : 1. Operating Temperature is the case surface temperature on the center/top side of the DRAM. For the measurement conditions, please refer to JESD51.2 standard ...

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Unbuffered DIMMs IDD Specification Parameters Definition (IDD values are for full operating range of Voltage and Temperature) Symbol Proposed Conditions Operating one bank active-precharge current CK(IDD RC(IDD), t RAS ...

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... IDD0 IDD1 IDD2P IDD2Q IDD2N IDD3P-F IDD3P-S IDD3N IDD4W IDD4R IDD5B IDD6 Normal IDD7 * Module IDD was calculated on the basis of component IDD and can be differently measured according to DQ loading cap VDD= 1.9V (DDR2-533@CL=4) 800 880 64 200 240 240 120 ...

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... Symbol IDD0 IDD1 IDD2P IDD2Q IDD2N IDD3P-F IDD3P-S IDD3N IDD4W IDD4R IDD5B IDD6 Normal IDD7 * Module IDD was calculated on the basis of component IDD and can be differently measured according to DQ loading cap VDD= 1.9V (DDR2-533@CL=4) 480 580 32 100 120 120 60 ...

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... IDD3N IDD4W IDD4R IDD5B IDD6 Normal IDD7 * Module IDD was calculated on the basis of component IDD and can be differently measured according to DQ loading cap. Input/Output Capacitance Parameter Non-ECC Input capacitance, CK and CK Input capacitance, CKE and CS Input capacitance, Addr, RAS, CAS, WE Input/output capacitance, DQ, DM, DQS, DQS ...

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Unbuffered DIMMs Electrical Characteristics & AC Timing for DDR2-533/400 SDRAM (0 °C < T < 95 °C; V CASE DDQ Refresh Parameters by Device Density Parameter Refresh to active/Refresh command time Average periodic refresh interval Speed Bins ...

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Unbuffered DIMMs Parameter Write postamble Write preamble Address and control input hold time Address and control input setup time Read preamble Read postamble Active to active command period for 1KB page size products Active to active command ...

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... Unbuffered DIMMs Physical Dimensions: 64Mbx8 based 64Mx64/x72 Module(1 Rank) M378T6553BG(Z)3 / M391T6553BG(Z)3 M378T6553BG(Z)0 / M391T6553BG(Z)0 (2) 2.50 5.00 4.00 2.50 1.50±0.10 Detail A The used device is 64M x8 DDR2 SDRAM, FBGA. DDR2 SDRAM Part NO : K4T51083QB 133.35 131.35 128.95 N/A (for x64) SPD ECC (for x72 63.00 4.00 0.80±0.05 3.80 0.20 1.00 Detail B ...

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... Unbuffered DIMMs Physical Dimensions: 64Mbx8 based 128Mx64/x72 Module(2 Ranks) M378T2953BG(Z)3 / M391T2953BG(Z)3 M378T2953BG(Z)0 / M391T2953BG(Z)0 (2) 2.50 5.00 4.00 2.50 1.50±0.10 Detail A The used device is 64M x8 DDR2 SDRAM, FBGA. DDR2 SDRAM Part NO : K4T51083QB 133.35 131.35 128.95 N/A (for x64) SPD ECC (for x72 63.00 N/A (for x64) ...

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... Unbuffered DIMMs Physical Dimensions: 32Mbx16 based 32Mx64 Module(1 Rank) M378T3354BG(Z)3 / M378T3354BG(Z)0 (2) 2.50 5.00 4.00 2.50 1.50±0.10 Detail A The used device is 32M x16 DDR2 SDRAM, FBGA. DDR2 SDRAM Part NO : K4T51163QB 133.35 131.35 128. 63.00 4.00 0.80±0.05 3.80 1.00 Detail B DDR2 SDRAM Units : Millimeters SPD 30.00 2.7 55.00 1.270 ± 0.10 3 ...

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Unbuffered DIMMs Revision History Revision 1.0 (Jan. 2004) - Initial Release Revision 1.1 (Jun. 2004) - Added lead-free part number in the ordering information - Changed IDD2P Revision 1.2 (Jul. 2004) - Added current values and part ...

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