HYS64D16001GDL-7-B INFINEON [Infineon Technologies AG], HYS64D16001GDL-7-B Datasheet
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HYS64D16001GDL-7-B
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HYS64D16001GDL-7-B Summary of contents
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... – – – – B 200 Small Outli ne Dual -In- Line Memor y Modules ...
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Edition 2003-08 Published by Infineon Technologies AG, St.-Martin-Strasse 53, 81669 München, Germany Infineon Technologies AG 2003. © All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as a guarantee of ...
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... – – – – B 200 Small Outli ne Dual -In- Line Memor y Modules ...
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HYS64D32020GDL–[5/6/7/8]–B, HYS64D1600xGDL–[6/7/8]–B, Revision History: V1.2 Previous Version: V1.1 Page Subjects (major changes since last revision) all New data sheet template 6,7,26,16 Added Part number HYS64D32020GDL-5-B including SPD and 7 Updated Complinance Code 18 Added DDR400B AC characteristics added I 16,17 ...
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... Table of Contents 1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.1 Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.2 Current Specification and Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 5 SPD Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 6 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Data Sheet HYS64D[1600x/32020]GDL–[5/6/7/8]–B Small Outline DDR SDRAM Modules 5 V1.2, 2003-08 ...
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... Description The HYS64D32020GDL–[5/6/7/8]–B and HYS64D1600xGDL–[6/7/8]–B are industry standard 200-Pin Small Outline Dual-In-Line Memory Modules (SO-DIMMs) organized as 32M designed with Double Data Rate Synchronous DRAMs (DDR SDRAM). A variety of decoupling capacitors are mounted on the PC board. The DIMMs feature serial presence detect based on a serial E ...
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... PC2700S–2533–0–C1 HYS64D32020GDL–6–B PC2700S–2533–0–A1 PC2100 (CL=2) HYS64D16000GDL–7–B PC2100S–2033–0–C1 HYS64D16001GDL–7–B PC2100S–2033–0–C1 HYS64D32020GDL–7–B PC2100S–2033–0–A1 PC1600 (CL=2) HYS64D16000GDL–8–B PC1600S–2022–0–C1 HYS64D32020GDL– ...
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... I SDA I/O SA0 - SA2 Input; O: Output; I/O: bidirectional In-/Output; AI: Analog Input; PWR: Power Supply; GND: Signal Ground; NC: Not Connected; NU: Not Usable 2) CKE1 and S1 are used on two bank modules only Table 4 Address Format Density Organization Memory Ranks 128MB 16M 64 1 256MB ...
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... DQ23 55 DQ24 56 DQ28 DQ25 60 DQ29 61 DQS3 62 DM3 Data Sheet HYS64D[1600x/32020]GDL–[5/6/7/8]–B Small Outline DDR SDRAM Modules Front side Back side Pin # Symbol Pin # Symbol 65 DQ26 66 DQ30 67 DQ27 68 DQ31 (CB0) 72 (CB4) 73 (CB1) ...
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... Figure 1 Pin Configuration Data Sheet HYS64D[1600x/32020]GDL–[5/6/7/8]–B Small Outline DDR SDRAM Modules front side back side 10 Pin Configuration V1.2, 2003-08 ...
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... BA0-BA1 A0-AN RAS CAS WE CKE0 CKE1 V SPD DD V REF Figure 2 Block Diagram - One Rank 16M Data Sheet HYS64D[1600x/32020]GDL–[5/6/7/8]–B Small Outline DDR SDRAM Modules CS DQS4 LDQS LDM DM4 DQ32 I/O 0 DQ33 I/O 1 DQ34 I/O 2 DQ35 I/O 3 DQ36 I/O 4 DQ37 I/O 5 DQ38 I/O 6 DQ39 I/O 7 DQS5 UDQS ...
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... Note: DQ wiring may differ from that described in this drawing; however DQ/DM/DQS relationships are maintained as shown strap connections: V and Strap out (open DDR SDRAM SO-DIMM HYS64D32020GDL–[5/6/7/8]–B 12 Small Outline DDR SDRAM Modules Pin Configuration CS LDQS LDM I/O 0 I/O 1 I/O 2 I I/O 5 I/O 6 I/O 7 ...
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... DDQ DDQ V – 0.04 V REF V + 0.15 V REF V –0.3 –0 0.36 0.71 1.4 13 Small Outline DDR SDRAM Modules Electrical Characteristics Values Unit Note/ Test typ. max. – DDQ 0.5 – +3.6 V – +3.6 V – +3.6 V – +70 C – +150 C 1 – – mA Unit Note/Test Condition ...
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... REF (DC) REF system supply for signal termination resistors, is expected to be set equal REF V stabilizes. REF 14 Small Outline DDR SDRAM Modules Electrical Characteristics Unit Note/Test Condition A Any input 0 V All other pins not under test 8) DQs are disabled ...
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... Auto-Refresh Current burst refresh RC RFCMIN Self-Refresh Current CKE 0.2 V; external clock on Operating Current 7 four bank interleaving with Burst Length = 4; see component data sheet. Data Sheet HYS64D[1600x/32020]GDL–[5/6/7/8]–B Small Outline DDR SDRAM Modules V IL,MAX V ; IH,MIN for DQ, DQS and DM; ...
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... DDx m I [component DDx DD3N modules currents are not included into calculations: module DDQ on load conditions 5) The module I values are calculated from the corrponent DDx Data Sheet HYS64D[1600x/32020]GDL–[5/6/7/8]–B Small Outline DDR SDRAM Modules 256MB ...
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... The module values are calculated from the component DDx m I [component DDx DD3N modules currents are not included into calculations: module DDQ load conditions 5) The module I values are calculated from the corrponent DDx Data Sheet HYS64D[1600x/32020]GDL–[5/6/7/8]–B 128MB Rank – ...
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... DQS falling edge hold time from CK (write cycle) Mode register set command cycle time Write preamble setup time Write postamble Write preamble Data Sheet HYS64D[1600x/32020]GDL–[5/6/7/8]–B Small Outline DDR SDRAM Modules Symbol –6 DDR333 Min. Max. Min. t –0.7 +0.7 – ...
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... A valid transition is defined as monotonic and meeting the input slew rate specifications of the device. When no writes were previously in progress on the bus, DQS will be transitioning from Hi-Z to logic LOW previous write was in progress, DQS could be HIGH, LOW, or transitioning from HIGH to LOW at this time, depending on Data Sheet HYS64D[1600x/32020]GDL–[5/6/7/8]–B Small Outline DDR SDRAM Modules Symbol –6 DDR333 Min. ...
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... LZ 0.8 t 0.7 1.25 DQSS 5 t — +0.6 DQSQ t — 1.0 QHS t t — – 0.3 — DQSL Small Outline DDR SDRAM Modules AC Characteristics t is equal to the actual system clock CK –7 Unit Note/ Test Condition DDR266A Min. Max. 2)3)4)5) –0.75 +0.75 ns 2)3)4)5) –0.75 +0.75 ns 2)3)4)5) 0.45 0. 2)3)4)5) 0.45 0. 2)3)4)5) ) min. ( ...
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... Write recovery time Auto precharge write recovery + precharge time Internal write to read command delay Exit self-refresh to non-read command Exit self-refresh to read command Average Periodic Refresh Interval Data Sheet HYS64D[1600x/32020]GDL–[5/6/7/8]–B Small Outline DDR SDRAM Modules Symbol –8 DDR200 DDR266A Min Max. Min. . ...
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... A maximum of eight Autorefresh commands can be posted to any given DDR SDRAM device. Data Sheet HYS64D[1600x/32020]GDL–[5/6/7/8]– +2 CK/CK slew rate are 1.0 V/ns. REF V stabilizes. REF 0.5 V/ns and < 1 V/ns for command/address and CK & CK slew rate > 1.0 V/ and V . OL(ac) 22 Small Outline DDR SDRAM Modules AC Characteristics t . DQSS t is equal to the actual system clock V1.2, 2003-08 ...
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... WE (Write) Latency 21 DIMM Attributes 22 Component Attributes 23 tCK @ CLmax -0.5 (Byte 18) [ns] 24 tAC SDRAM @ CLmax -0.5 [ns] 25 tCK @ CLmax -1 (Byte 18) [ns] Data Sheet HYS64D[1600x/32020]GDL–[5/6/7/8]–B Small Outline DDR SDRAM Modules 128MB 128MB 128MB Rank 1 Rank 1 Rank –6 –6 –7 HEX ...
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... JEDEC ID Code for Infineon 69 JEDEC ID Code for Infineon 70 JEDEC ID Code for Infineon 71 JEDEC ID Code for Infineon 72 Module Manufacturer Location 73 Part Number, Char 1 Data Sheet HYS64D[1600x/32020]GDL–[5/6/7/8]–B Small Outline DDR SDRAM Modules 128MB 128MB 128MB Rank 1 Rank 1 Rank –6 –6 –7 ...
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... Part Number, Char 17 90 Part Number, Char 18 91 Module Revision Code 92 Test Program Revision Code 93 Module Manufacturing Date Year 94 Module Manufacturing Date Week Module Serial Number 99 -127 not used Data Sheet HYS64D[1600x/32020]GDL–[5/6/7/8]–B Small Outline DDR SDRAM Modules 128MB 128MB 128MB ...
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... DIMM Attributes 22 Component Attributes 23 tCK @ CLmax -0.5 (Byte 18) [ns] 24 tAC SDRAM @ CLmax -0.5 [ns] 25 tCK @ CLmax -1 (Byte 18) [ns] 26 tAC SDRAM @ CLmax -1 [ns] 27 tRPmin (ns) Data Sheet HYS64D[1600x/32020]GDL–[5/6/7/8]–B Small Outline DDR SDRAM Modules 256MB 256MB Ranks 2 Ranks –5 –6 HEX HEX ...
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... JEDEC ID Code for Infineon 71 JEDEC ID Code for Infineon 72 Module Manufacturer Location 73 Part Number, Char 1 74 Part Number, Char 2 75 Part Number, Char 3 Data Sheet HYS64D[1600x/32020]GDL–[5/6/7/8]–B Small Outline DDR SDRAM Modules 256MB 256MB Ranks 2 Ranks –5 –6 HEX HEX 28 30 ...
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... Module Revision Code 92 Test Program Revision Code 93 Module Manufacturing Date Year 94 Module Manufacturing Date Week Module Serial Number 99 - 127 not used Data Sheet HYS64D[1600x/32020]GDL–[5/6/7/8]–B Small Outline DDR SDRAM Modules 256MB 256MB Ranks 2 Ranks –5 –6 HEX HEX 33 ...
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... Package Outlines (2.15) 1 1.8 11.4 ±0.1 (2.45) 1.5 1 ±0.1 101 2 MIN. Detail of contacts 0.6 ±0.1 Burnished, no burr allowed Figure 4 Package Outlines – Raw Card A DDR-SDRAM SO-DIMM Module HYS64D32020GDL–[5/6/7/8]– B Data Sheet HYS64D[1600x/32020]GDL–[5/6/7/8]–B 67.6 63.6 ±0.1 (2.45) 18.45 ±0.1 ±0.1 (2.4) 47.4 ±0.1 (2.7) (2.15) ±0.1 200 0.45 ±0.03 29 Small Outline DDR SDRAM Modules Package Outlines 3 ...
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... MIN. Detail of contacts 0.6 ±0.1 Burnished, no burr allowed Figure 5 Package Outlines Raw Card C DDR SDRAM SO-DIMM Modules HYS64D1600xGDL–[6/7/8]–B Data Sheet HYS64D[1600x/32020]GDL–[5/6/7/8]–B 67.6 63.6 (2.45) 18.45 ±0.1 ±0.1 (2.4) 47.4 ±0.1 (2.7) (2.15) ±0.1 200 0.45 ±0.03 30 Small Outline DDR SDRAM Modules Package Outlines 2 ...
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Published by Infineon Technologies AG ...