M393T6450FG0-CC SAMSUNG [Samsung semiconductor], M393T6450FG0-CC Datasheet
M393T6450FG0-CC
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M393T6450FG0-CC Summary of contents
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... Registered DIMMs DDR2 Registered SDRAM MODULE 240pin Registered Module based on 256Mb F-die INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IN SAMSUNG PRODUCTS OR TECHNOLOGY. ALL INFORMATION IN THIS DOCUMENT IS PROVIDED ON AS " ...
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... DDR2 SDRAM Package: 60ball FBGA - 64Mx4/32Mx8 • All of Lead-free products are compliant for RoHS Note : For detailed DDR2 SDRAM operation, please refer to Samsung’s Device operation & Timing diagram. Address Configuration Organization 64Mx4(256Mb) based Module 32Mx8(256Mb) based Module Organization Component Composition 32Mx72 32Mx8(K4T56083QF)*9EA 32Mx72 ...
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... RESET (Pin 18) is connected to both OE of PLL and Reset of register. 2. The Test pin (Pin 102) is reserved for bus analysis probes and is not connected on normal memory modules (DIMMs) 3. NC/Err_Out ( Pin 55) and NC/Par_In (Pin 68) are for optional function to check address and command parity. ...
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Registered DIMMs Input/Output Functional Description Symbol Type Input CK0 Positive line of the differential pair of system clock inputs that drives input to the on-DIMM PLL. Input CK0 Negative line of the differential pair of system clock inputs ...
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... Registered DIMMs Functional Block Diagram: 256MB, 32Mx72 Module RS0 DQS0 DQS0 DM0/DQS9 NC/DQS9 DM/ NU/ CS DQS DQS RDQS RDQS DQ0 I/O 0 DQ1 I DQ2 I/O 2 DQ3 I/O 3 DQ4 I/O 4 DQ5 I/O 5 DQ6 I/O 6 DQ7 I/O 7 DQS1 DQS1 DM1/DQS10 NC/DQS10 DM/ NU/ CS DQS DQS RDQS RDQS DQ8 I/O 0 DQ9 I ...
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... Registered DIMMs Functional Block Diagram: 512MB, 64Mx72 Module RS1 RS0 DQS0 DQS0 DM0/DQS9 NC/DQS9 DM/ NU/ CS DQS DQS RDQS RDQS DQ0 I/O 0 DQ1 I DQ2 I/O 2 DQ3 I/O 3 DQ4 I/O 4 DQ5 I/O 5 DQ6 I/O 6 DQ7 I/O 7 DQS1 DQS1 DM1/DQS10 NC/DQS10 DM/ NU/ CS DQS DQS RDQS RDQS DQ8 I/O 0 DQ9 ...
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... Registered DIMMs Functional Block Diagram: 512MB, 64Mx72 Module VSS RS0 DQS0 DQS0 DM CS DQS DQS DQ0 I/O 0 DQ1 D0 I/O 1 DQ2 I/O 2 DQ3 I/O 3 DQS1 DQS1 DM CS DQS DQS DQ8 I/O 0 DQ9 I DQ10 I/O 2 DQ11 I/O 3 DQS2 DQS2 DM CS DQS DQS DQ16 I/O 0 DQ17 D2 I/O 1 DQ18 ...
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Registered DIMMs Absolute Maximum DC Ratings Symbol Parameter Voltage on V pin relative Voltage on V pin relative DDQ DDQ Voltage on V pin relative DDL DDL ...
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Registered DIMMs Operating Temperature Condition Symbol TOPER Operating Temperature 1. Operating Temperature is the case surface temperature on the center/top side of the DRAM. For the measurement conditions, please refer to JESD51.2 standard ...
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Registered DIMMs IDD Specification Parameters Definition (IDD values are for full operating range of Voltage and Temperature) Symbol Proposed Conditions Operating one bank active-precharge current CK(IDD RC(IDD), t RAS = ...
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... IDD2N IDD3P-F IDD3P-S IDD3N IDD4W IDD4R IDD5B IDD6* Normal IDD7 * IDD6 = DRAM current + standby current of PLL and Register ** Module IDD was calculated on the basis of component IDD and can be differently measured according to DQ loading cap VDD= 1.9V (DDR2-533@CL=4) TBD 1,420 ...
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... IDD4W IDD4R IDD5B IDD6* Normal IDD7 * IDD6 = DRAM current + standby current of PLL and Register ** Module IDD was calculated on the basis of component IDD and can be differently measured according to DQ loading cap. Input/Output Capacitance (V Parameter Part-Number Input capacitance, CK and CK Input capacitance, CKE and CS ...
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Registered DIMMs Electrical Characteristics & AC Timing for DDR2-667/533/400 SDRAM (0 °C < T < 95 °C; V CASE DDQ Refresh Parameters by Device Density Parameter Refresh to active/Refresh command time Average periodic refresh interval Speed Bins and ...
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Registered DIMMs Parameter DQS input low pulse width DQS falling edge to CK setup time DQS falling edge hold time from CK Mode register set command cycle time Write postamble Write preamble Address and control input hold time ...
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... Registered DIMMs Physical Dimensions: 32Mbx8 based 32Mx72 Module(1 Rank) M393T3253FG(Z)0 / M393T3253FG(Z)3 / M393T3253FZA 63.00 5.00 4.00 2.50 1.50±0.10 Detail A The used device is 32M x8 DDR2 SDRAM, FBGA. DDR2 SDRAM Part NO : K4T56083QF 133.35 PLL A B 55.00 4.00 0.80±0.05 3.80 0.20 1.00 Detail B DDR2 SDRAM Units : Millimeters 2.70 30.00 1.0 max 1.27 ± 0.10 3.00 4.00 Rev. 1.3 Aug. 2005 ...
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... Registered DIMMs Physical Dimensions: 32Mbx8/64Mbx4 based 64Mx72 Module(2/1 Ranks) M393T6453FG(Z)0 / M393T6453FG(Z)3 / M393T6453FZA M393T6450FG(Z)0 / M393T6450FG(Z)3 / M393T6450FZA 63.00 5.00 4.00 2.50 1.50±0.10 Detail A The used device is 32M x8 / 64M x4 DDR2 SDRAM, FBGA. DDR2 SDRAM Part NO : K4T56083QF / K4T56043QF 133.35 PLL A B 55.00 4.00 0.80±0.05 3.80 0.20 1.00 Detail B DDR2 SDRAM Units : Millimeters 4 ...
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Registered DIMMs 240 Pin DDR2 Registered DIMM Clock Topology CK0 120 ohms CK0 120 ohms C Note: 1. The clock delay from the input of the PLL clock to the input of any DDR2 SDRAM or register will ...
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Registered DIMMs Revision History Revision 1.0 (Jan. 2004) - Initial Release Revision 1.1 (Jun. 2004) - Added Lead-Free part number in ordering information. - Changed IDD2P Revision 1.2 (Sep. 2004) - Changed IDD6 Revision 1.3 (Aug. 2004) - ...