HYS64D128320GU-6-B INFINEON [Infineon Technologies AG], HYS64D128320GU-6-B Datasheet - Page 18

• Manufacturer Part Number: HYS64D128320GU-6-B
• Description: 184-Pin Unbuffered Dual-In-Line Memory Modules
• Manufacturer: INFINEON [Infineon Technologies AG]

Table 12
Parameter
Input Leakage Current
Output Leakage Current
Output High Current,
Normal Strength Driver
Output Low
Current, Normal Strength
Driver
1) 0 °C ≤
2) DDR400 conditions apply for all clock frequencies above 166 MHz
3) Under all conditions,
4) Peak to peak AC noise on
5)
6)
7) The ration of the pull-up current to the pull-down current is specified for the same temperature and voltage, over the entire
8) Inputs are not recognized as valid until
9) Values are shown per DDR SDRAM component
Table 13
Parameter
DQ output access time from CK/CK
DQS output access time from CK/CK
CK high-level width
CK low-level width
Clock Half Period
Clock cycle time
DQ and DM input hold time
DQ and DM input setup time
Control and Addr. input pulse width
(each input)
Data Sheet
V
to
V
temperature and voltage range, for device drain to source voltage from 0.25 to 1.0 V. For a given output, it represents the
maximum difference between pull-up and pull-down drivers due to process variation.
TT
ID
V
is the magnitude of the difference between the input level on CK and the input level on CK.
REF
is not applied directly to the device.
T
, and must track variations in the DC level of
A
≤ 70 °C
Electrical Characteristics and DC Operating Conditions (cont’d)
AC Timing - Absolute Specifications for PC3200 and PC2700
V
DDQ
V
must be less than or equal to
Symbol
I
I
I
I
REF
I
OZ
OH
OL
may not exceed ± 2% V
Min.
–2
–5
—
16.2
V
V
REF
Symbol
t
t
t
t
t
t
t
t
t
TT
AC
DQSCK
CH
CL
HP
CK
DH
DS
IPW
is a system supply for signal termination resistors, is expected to be set equal
stabilizes.
V
Typ.
–5
DDR400B
Min.
–0.5
–0.6
0.45
0.45
5
6
7.5
0.4
0.4
2.2
REF
Values
min. (
REF (DC)
V
18
.
DD
HYS[64/72]D[64300/128320][G/H]U–[5/6]–B
.
t
CL
Max.
+0.5
+0.6
0.55
0.55
8
12
12
—
—
—
. V
,
t
Max.
2
5
–16.2
—
REF
CH
)
is also expected to track noise variations in
Unbuffered DDR SDRAM Modules
–6
DDR333
Min.
–0.7
–0.6
0.45
0.45
—
7.5
7.5
0.45
0.45
2.2
min. (
Unit Note/Test Condition
µA
µA
mA
mA
t
CL
Max.
+0.7
+0.6
0.55
0.55
—
12
12
—
—
—
,
t
CH
Any input 0 V ≤
All other pins not under test
= 0 V
DQs are disabled;
0 V ≤
V
V
OUT
OUT
Electrical Characteristics
)
10042003-RYU3-RQON
V
8)9)
= 1.95 V
= 0.35 V
Unit
ns
ns
t
t
ns
ns
ns
ns
ns
ns
ns
CK
CK
OUT
Rev. 1.0, 2004-05
≤
V
8)
8)
DDQ
Note/ Test
Condition
2)3)4)5)
2)3)4)5)
2)3)4)5)
2)3)4)5)
2)3)4)5)
CL = 3.0
2)3)4)5)
CL = 2.5
2)3)4)5)
CL = 2.0
2)3)4)5)
2)3)4)5)
2)3)4)5)
2)3)4)5)6)
V
IN
8)
≤
1)
V
V
DD
DDQ
;
1)
.