SRT512-SBN18/1G2 STMICROELECTRONICS [STMicroelectronics], SRT512-SBN18/1G2 Datasheet - Page 14

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SRT512-SBN18/1G2

Manufacturer Part Number
SRT512-SBN18/1G2
Description
13.56 MHz short-range contactless memory chip with 512-bit EEPROM and anticollision functions
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
Memory mapping
4
Figure 12. SRT512 memory mapping
14/46
Block
Addr
UID0
UID1
255
10
11
12
13
14
15
0
1
2
3
4
5
6
7
8
9
MSB
b
31
Memory mapping
The SRT512 is organized as 16 blocks of 32 bits as shown in
accessible by the Read_block command. Depending on the write access, they can be
updated by the Write_block command. A Write_block updates all the 32 bits of the block.
OTP_Lock_Reg
32 bits binary counter
32 bits binary counter
64 bits UID area
b
User area
User area
User area
User area
User area
User area
User area
User area
User area
User area
User area
User area
User area
User area
32-bit block
Doc ID 13277 Rev 4
16
b
1
15
b
ST Reserved
14
b
8
b
7
Fixed Chip_ID
(Option)
Table
LSB
12. All blocks are
b
0
System OTP bits
Description
Count down
EEPROM
EEPROM
Lockable
lockable
counter
ROM
SRT512

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