LRI64-A6S2U STMICROELECTRONICS [STMicroelectronics], LRI64-A6S2U Datasheet - Page 12

• Manufacturer Part Number: LRI64-A6S2U
• Description: Memory tag IC at 13.56 MHz, with 64-bit unique ID and WORM user area, ISO 15693 and ISO 18000-3 Mode 1 compliant
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

Data rate and data coding
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Data rate and data coding
The data coding method involves pulse position modulation. The LRI64 supports the “1-out-
of-4” pulse coding mode. Any request that the VCD might send in the “1-out-of-256” pulse
coded mode, is ignored, and the LRI64 remains in its current state.
Two bit values are encoded at a time, by the positioning of a pause of the carrier frequency
in one of four possible 18.88 µs (256/f
Four successive pairs of bits form a byte. The transmission of one byte takes 302.08 µs and,
consequently, the data rate is 26.48 Kbit/s (f
The encoding for the least significant pair of bits is transmitted first. For example
shows the transmission of E1h (225d, 1110 0001b) by the VCD.
Figure 6.
Pulse position for "00"
Pulse position for "01" (1=LSB)
Pulse position for "10" (0=LSB)
Pulse position for "11"
9.44 µs
“1-out-of-4” coding mode
9.44 µs
28.32 µs
C
9.44 µs
) time slots, as shown in
C
/512).
75.52 µs
75.52 µs
75.52 µs
75.52 µs
47.20µs
9.44 µs
Figure
66.08 µs
6.
Figure 5
9.44 µs
AI06658
LRI64