AT52BR1672-85CI ATMEL [ATMEL Corporation], AT52BR1672-85CI Datasheet - Page 15
![no-image](/images/no-image-200.jpg)
AT52BR1672-85CI
Manufacturer Part Number
AT52BR1672-85CI
Description
16-megabit Flash and 2-megabit/ 4-megabit SRAM Stack Memory
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT52BR1672-85CI.pdf
(39 pages)
- Current page: 15 of 39
- Download datasheet (360Kb)
AC Read Characteristics
AC Read Waveforms
Notes:
2604B–STKD–09/02
Symbol
t
t
t
t
t
t
ACC
CE
OE
DF
OH
RO
(3)(4)
(1)
(2)
1. CE may be delayed up to t
2. OE may be delayed up to t
3. t
4. This parameter is characterized and is not 100% tested.
without impact on t
DF
Parameter
Address to Output Delay
CE to Output Delay
OE to Output Delay
CE or OE to Output Float
Output Hold from OE, CE or Address, whichever occurred first
RESET to Output Delay
is specified from OE or CE, whichever occurs first (CL = 5 pF).
ACC
RESET
(1)(2)(3)(4)
.
OUTPUT
ADDRESS
OE
CE
ACC
CE
- t
- t
OE
CE
after the falling edge of CE without impact on t
after the address transition without impact on t
HIGH Z
tACC
tRO
ADDRESS VALID
tCE
tOE
AT52BR1672(T)-85
OUTPUT
Min
VALID
0
0
0
tOH
AT52BR1672(T)/1674(T)
tDF
Max
100
85
85
40
25
CE
ACC
or by t
.
AT52BR1674(T)-85
Min
ACC
0
0
0
- t
OE
after an address change
Max
100
85
85
40
25
Units
ns
ns
ns
ns
ns
ns
15
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