HI-3110 HOLTIC [Holt Integrated Circuits], HI-3110 Datasheet - Page 27
HI-3110
Manufacturer Part Number
HI-3110
Description
Avionics CAN Controller with Integrated Transceiver
Manufacturer
HOLTIC [Holt Integrated Circuits]
Datasheet
1.HI-3110.pdf
(53 pages)
- Current page: 27 of 53
- Download datasheet (190Kb)
Setting bits in the Status Flag Enable Register causes the STAT pin to go high when any of the corresponding bits in the Status Flag
Register are set by HI-3110 as a result of the related events described below.
Bit Name
7
6
5
4
3
2
1
0
STATUS FLAG ENABLE REGISTER: STATE
(Write, SPI Po-code 0x1E)
(Read, SPI Op-code 0xE6)
TXMTYFE
TXFULLFE
TXHISFFE
ERRWFE
ERRPFE
BUSOFFFE
RXFMTYFE
RXFFULLFE
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Default Description
1
0
0
0
0
0
1
0
Error warning status flag enable (96
Setting this bit causes the status of the ERRW bit in the Status Flag Register to be output on the
STAT pin.
Transmit FIFO empty status flag enable.
Setting this bit causes the status of the TXMTY bit in the Status Flag Register to be output on
Transmit FIFO full status flag enable.
Setting this bit causes the status of the TXFULL bit in the Status Flag Register to be output on
the STAT pin.
Transmit History FIFO full status flag enable.
Setting this bit causes the status of the TXHISF bit in the Status Flag Register to be output on
the STAT pin.
Error Passive status flag enable.
Setting this bit causes the status of the ERRP bit in the Status Flag Register to be output on the
STAT pin.
Bus-off status flag enable.
Setting this bit causes the status of the BUSOFF bit in the Status Flag Register to be output on
the STAT pin.
Receive FIFO empty status flag enable.
Setting this bit causes the status of the RXFMTY bit in the Status Flag Register to be
output on the STAT pin.
Receive FIFO full status flag enable.
Setting this bit causes the status of the RXFFULL bit in the Status Flag Register to be output on
the STAT pin.
the STAT pin.
HOLT INTEGRATED CIRCUITS
HI-3110
MSB
7
27
6
5
£
4
(TEC or REC)
3
2
1
LSB
0
£
127).
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