SI53154-A01AGM Silicon Laboratories Inc, SI53154-A01AGM Datasheet

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SI53154-A01AGM

Manufacturer Part Number
SI53154-A01AGM
Description
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of SI53154-A01AGM

Lead_time
70
Pack_quantity
92
Comm_code
85423990

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SI53154-A01AGM
0
Part Number:
SI53154-A01AGMR
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
Part Number:
SI53154-A01AGMR
0
PCI-E
F
Features
Applications
Description
The Si53154 is a spread aware PCIe clock buffer that can source four
PCIe clocks simultaneously. The device has four hardware output enable
control inputs for enabling the respective differential outputs on the fly
while powered on along with output enable control through I
communication. In addition to the hardware control pins, I
programmability is also available to promptly achieve optimum clock
signal integrity through skew and edge rate control on true, compliment,
or both differential outputs as well as amplitude control.
Functional Block Diagram
Preliminary Rev. 0.1 1/12
ANOUT
PCI-Express Gen 1, Gen 2, and
Gen 3 compliant
Low power push-pull type
differential output buffers
Integrated resistors on differential
clocks
Dedicated output enable pin for
all clocks
Four PCI-Express buffered
clocks
100 to 210 MHz clock input range
Network attached storage
Multi-function printers
DIFFIN
DIFFIN
OE [3:0]
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.
SDATA
SCLK
XPRESS
Control & Memory
Control
B
UFFER
RAM
G
EN
Copyright © 2012 by Silicon Laboratories
1, G
I
capabilities
Spread aware for maximum
electromagnetic interference
(EMI) reduction
Industrial temperature:
–40 to 85
3.3 V power supply
24-pin QFN package
Wireless access point
Routers
2
C support with readback
EN
o
C
2, & G
DIFF0
DIFF1
DIFF2
DIFF3
EN
2
2
C
C
3 Q
Patents pending
*Note: Internal 100 kohm pull-up.
OE1*
VDD
OE2*
VDD
VDD
UAD
VSS
Ordering Information:
1
2
3
4
5
6
Pin Assignments
S i 5 3 1 5 4
24
See page 17.
7
23
8
22
9
GND
25
21
10
20
11
12
19
18
17
16
15
14
13
OE3*
VDD
DIFF3
DIFF3
DIFF2
DIFF2
Si53154

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