ZL50233GDC ZARLINK [Zarlink Semiconductor Inc], ZL50233GDC Datasheet - Page 26
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ZL50233GDC
Manufacturer Part Number
ZL50233GDC
Description
4 Channel Voice Echo Cancellor
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet
1.ZL50233GDC.pdf
(37 pages)
26
ZL50233
This register allows the user to program the level of the Non-Linear Processor Threshold (NLPTHR). The 16 bit
2’s complement linear value defaults to 0CE0
dB. The high byte is in Register 2 and the low byte is in Register 1.
This register allows the user to program the level of Double-Talk Detection Threshold (DTDT). The 16 bit 2’s
complement linear value defaults to 4800
dB. The high byte is in Register 2 and the low byte is in Register 1.
DTDT15
DTDT7
NLP15
NLP7
Bit 7
Bit 7
Bit 7
Bit 7
Power-up
Power-up
Power-up
Power-up
48
00
0C
E0
hex
hex
hex
hex
DTDT14
DTDT6
Bit 6
Bit 6
NLP14
NLP6
Bit 6
Bit 6
DTDT13
ECA: Non-Linear Processor Threshold Register 2
ECB: Non-Linear Processor Threshold Register 2
ECA: Non-Linear Processor Threshold Register 1
ECB: Non-Linear Processor Threshold Register 1
DTDT5
ECA: Double-Talk Detection Threshold Register 2
ECB: Double-Talk Detection Threshold Register 2
ECA: Double-Talk Detection Threshold Register 1
ECB: Double-Talk Detection Threshold Register 1
Bit 5
Bit 5
NLP13
NLP5
Bit 5
Bit 5
Functional Description of Register Bits
Functional Description of Register Bits
DTDT12
DTDT4
NLP12
hex
NLP4
Bit 4
Bit 4
Bit 4
Bit 4
= 0.5625 or -5 dB. The maximum value is 7FFF
hex
Zarlink Semiconductor Inc.
(NLPTHR)
(NLPTHR)
(NLPTHR)
(NLPTHR)
= 0.1 or -20.0dB. The maximum value is 7FFF
NLP11
DTDT11
NLP3
DTDT3
Bit 3
Bit 3
Bit 3
Bit 3
NLP10
NLP2
Bit 2
Bit 2
DTDT10
DTDT2
Bit 2
Bit 2
19
39
18
38
NLP9
NLP1
Bit 1
Bit 1
15
35
14
34
DTDT9
DTDT1
hex
hex
hex
hex
Bit 1
Bit 1
hex
hex
hex
hex
R/W Address:
R/W Address:
R/W Address:
R/W Address:
R/W Address:
R/W Address:
R/W Address:
R/W Address:
+ Base Address
+ Base Address
+ Base Address
+ Base Address
hex
+ Base Address
+ Base Address
+ Base Address
+ Base Address
hex
= 0.9999 or 0
= 0.9999 or 0
Data Sheet
DTDT8
DTDT0
NLP8
NLP0
Bit 0
Bit 0
Bit 0
Bit 0