ZL50075GAC ZARLINK [Zarlink Semiconductor Inc], ZL50075GAC Datasheet - Page 29
![no-image](/images/no-image-200.jpg)
ZL50075GAC
Manufacturer Part Number
ZL50075GAC
Description
32 K Channel Digital Switch with High Jitter Tolerance, Rate Conversion per Group of 2 Streams (8, 16, 32 or 64 Mbps), and 64 Inputs and 64 Outputs
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet
1.ZL50075GAC.pdf
(60 pages)
- Current page: 29 of 60
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•
The TAP signals are only applied when the ZL50075 is required to be in test mode. When in normal, non-test mode,
TRST must be connected low to disable the test logic. The remaining test pins may be left unconnected.
12.2
The ZL50075 uses the public instructions defined in the IEEE 1149.1 standard. The JTAG interface contains a
16-bit instruction register. Instructions are serially loaded into the instruction register from the TDi when the TAP
controller is in its shifted-OR state. These instructions are subsequently decoded to achieve two basic functions: to
select the test data register that may operate while the instruction is current and to define the serial test data
register path that is used to shift data between TDi and TDo during register scanning.
12.3
As specified in the IEEE 1149.1 standard, the ZL50075 JTAG Interface contains three test data registers:
•
•
•
12.4
A Boundary Scan Description Language (BSDL) file is available from Zarlink Semiconductor to aid in the use of the
IEEE 1149.1 test interface.
Test Reset (TRST) - Resets the JTAG scan structure. This pin is internally pulled to V
driven from an external source. When JTAG is not in use, this pin must be tied low for normal operation.
The Boundary-Scan Register - The Boundary-Scan register consists of a series of Boundary-Scan cells
arranged to form a scan path around the boundary of the ZL50075 core logic.
The Bypass Register - The Bypass register is a single stage shift register that provides a one-bit path from
TDi to TDo.
The Device Identification Register - The JTAG device ID for the ZL50075 is C39B14B
Instruction Register
Test Data Register
Boundary Scan Description Language (BSDL)
Version
Part Number
Manufacturer ID
LSB
<31:28>
<27:12>
<11:1>
<0>
Zarlink Semiconductor Inc.
ZL50075
29
0000
1100 0011 1001 1011
0001 0100 101
1
DD_IO
H
when it is not
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