AM79C973VCW AMD [Advanced Micro Devices], AM79C973VCW Datasheet - Page 74
![no-image](/images/no-image-200.jpg)
AM79C973VCW
Manufacturer Part Number
AM79C973VCW
Description
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
1.AM79C973VCW.pdf
(304 pages)
- Current page: 74 of 304
- Download datasheet (3Mb)
to be 64 bytes in the transmit FIFO to start a transmis-
sion.
Automatic Pad Generation
Transmit frames can be automatically padded to extend
them to 64 data bytes (excluding preamble). This al-
lows the minimum frame size of 64 bytes (512 bits) for
IEEE 802.3/Ethernet to be guaranteed with no software
intervention from the host/controlling process. Setting
the APAD_XMT bit in CSR4 enables the automatic
padding feature. The pad is placed between the LLC
data field and FCS field in the IEEE 802.3 frame. FCS
is always added if the frame is padded, regardless of
the state of DXMTFCS (CSR15, bit 3) or ADD_FCS
(TMD1, bit 29). The transmit frame will be padded by
bytes with the value of 00H. The default value of
APAD_XMT is 0, which will disable automatic pad gen-
eration after H_RESET.
.
The 544 bit count is derived from the following:
At the point that FCS is to be appended, the transmitted
frame should contain:
A minimum length transmit frame from the Am79C973/
Am79C975 controller, therefore, will be 576 bits, after
the FCS is appended.
Transmit FCS Generation
Automatic generation and transmission of FCS for a
transmit frame depends on the value of DXMTFCS
(CSR15, bit 3). If DXMTFCS is cleared to 0, the trans-
mitter will generate and append the FCS to the trans-
mitted frame. If the automatic padding feature is
invoked (APAD_XMT is set in CSR4), the FCS will be
appended to frames shorter than 64 bytes by the
74
Preamble/SFD + (Min Frame Size - FCS)
64 + (512-32) = 544 bits
Minimum frame size (excluding preamble/SFD,
including FCS)
Preamble/SFD size 8 bytes
FCS size
1010....1010
Preamble
Bits
56
10101011
SFD
Bits
8
64 bytes
4 bytes
Figure 33. ISO 8802-3 (IEEE/ANSI 802.3) Data Frame
Destination
Address
Bytes
6
512 bits
64 bits
32 bits
P R E L I M I N A R Y
Am79C973/Am79C975
Address
Source
Bytes
6
It is the responsibility of upper layer software to cor-
rectly define the actual length field contained in the
message to correspond to the total number of LLC
Data bytes encapsulated in the frame (length field as
defined in the ISO 8802-3 (IEEE/ANSI 802.3) stan-
dard). The length value contained in the message is not
used by the Am79C973/Am79C975 controller to com-
pute the actual number of pad bytes to be inserted. The
Am79C973/Am79C975 controller will append pad
bytes dependent on the actual number of bits transmit-
ted onto the network. Once the last data byte of the
frame has completed, prior to appending the FCS, the
Am79C973/Am79C975 controller will check to ensure
that 544 bits have been transmitted. If not, pad bytes
are added to extend the frame size to this value, and
the FCS is then added. See Figure 33.
Am79C973/Am79C975 controller regardless of the
state of DXMTFCS or ADD_FCS (TMD1, bit 29). Note
that the calculated FCS is transmitted most significant
bit first. The default value of DXMTFCS is 0 after
H_RESET.
ADD_FCS (TMD1, bit 29) allows the automatic gener-
ation and transmission of FCS on a frame-by-frame
basis. DXMTFCS should be set to 1 in this mode. To
generate FCS for a frame, ADD_FCS must be set in all
descriptors of a frame (STP is set to 1). Note that bit 29
of TMD1 has the function of ADD_FCS if SWSTYLE
(BCR20, bits 7-0) is programmed to 0, 2, or 3.
Transmit Exception Conditions
Exception conditions for frame transmission fall into
two distinct categories: those conditions which are the
result of normal network operation, and those which
occur due to abnormal network and/or host related
events.
Normal events which may occur and which are handled
autonomously by the Am79C973/Am79C975 controller
include collisions within the slot time with automatic re-
try. The Am79C973/Am79C975 controller will ensure
that collisions which occur within 512 bit times from the
Length
Bytes
2
Data
LLC
46 – 1500
Bytes
Pad
Bytes
FCS
4
21510D-38
Related parts for AM79C973VCW
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
![AMD-751AC](/images/manufacturer_photos/0/0/14/advanced_micro_devices_tmb.jpg)
Part Number:
Description:
AMD-751ACAMD-751-TM System Controller Revision Guide
Manufacturer:
Advanced Micro Devices
Datasheet:
![AMD-751](/images/manufacturer_photos/0/0/14/advanced_micro_devices_tmb.jpg)
Part Number:
Description:
AMD-751AMD-751-TM System Controller Revision Guide
Manufacturer:
Advanced Micro Devices
Datasheet:
![AMD-X5-133SFZ](/images/manufacturer_photos/0/0/14/advanced_micro_devices_tmb.jpg)
Part Number:
Description:
AMD-X5-133SFZAm5X86? Microprocessor Family
Manufacturer:
Advanced Micro Devices
Datasheet:
![AMD-8131BLC](/images/manufacturer_photos/0/0/14/advanced_micro_devices_tmb.jpg)
Part Number:
Description:
Hyper Transport PCI-X Tunnel
Manufacturer:
Advanced Micro Devices
Datasheet:
![AMD-8111AC](/images/manufacturer_photos/0/0/14/advanced_micro_devices_tmb.jpg)
Part Number:
Description:
HyperTransport I/O Hub
Manufacturer:
Advanced Micro Devices
Datasheet:
![AMD-640AC](/images/manufacturer_photos/0/0/14/advanced_micro_devices_tmb.jpg)
Part Number:
Description:
System Controller
Manufacturer:
Advanced Micro Devices
Datasheet:
![AMD-K6](/images/no-image3.png)
Part Number:
Description:
AMD-K6 Processor
Manufacturer:
AMD [Advanced Micro Devices]
Datasheet:
![AMD-K6-2E/400AFR](/images/no-image3.png)
Part Number:
Description:
AMD-K6™-2E Embedded Processor
Manufacturer:
AMD [Advanced Micro Devices]
Datasheet:
![AMD-8132BLCT](/images/manufacturer_photos/0/0/44/amd__advanced_micro_devices__tmb.jpg)
Part Number:
Description:
Manufacturer:
AMD (ADVANCED MICRO DEVICES)
Datasheet:
![AMD-K6-IIIE+550ACR](/images/manufacturer_photos/0/0/44/amd__advanced_micro_devices__tmb.jpg)
Part Number:
Description:
Manufacturer:
AMD (ADVANCED MICRO DEVICES)
Datasheet:
![AMD-766AC](/images/no-image3.png)
Part Number:
Description:
Peripheral Bus Controller
Manufacturer:
AMD [Advanced Micro Devices]
Datasheet: