AM79C973VCW AMD [Advanced Micro Devices], AM79C973VCW Datasheet - Page 287
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AM79C973VCW
Manufacturer Part Number
AM79C973VCW
Description
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
1.AM79C973VCW.pdf
(304 pages)
- Current page: 287 of 304
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N2:EOM
Ethernet
activity:
Wire
N0: Packet preamble, SFD
and destination address
are arriving.
C9: Controller writes descriptor #3.
C8: Controller is performing intermittent
C7: Controller writes descriptor #2.
C6: "Last chance" lookahead to
C5: Controller is performing intermittent
C4: Lookahead to descriptor #3 (OWN).
C3: SRP interrupt is
C2: Controller writes descriptor #1.
C1: Controller is performing intermittent
C0: Lookahead to descriptor #2.
{
bursts of DMA to fill data buffer #3.
descriptor #3 (OWN).
bursts of DMA to fill data buffer #2
generated.
bursts of DMA to fill data buffer #1.
N1: 64th byte of packet
data arrives.
}
Controller
Ethernet
activity:
P R E L I M I N A R Y
Figure 88. LAPP Timeline
Am79C973/Am79C975
Buffer
Buffer
Buffer
#3
#2
#1
S10: Driver sets up TX descriptor.
S9: Application processes packet, generates TX packet.
S7: Driver polls descriptor of buffer #3.
S6: Driver copies data from buffer #2 to the application
S5: Driver polls descriptor #2.
S4: Driver copies data from buffer #1 to the application
S1: Interrupt latency.
S0: Driver is idle.
buffer.
Software
activity:
}
buffer.
}
}
S3: Driver writes modified application
S2: Driver call to application to
S8: Driver calls application
pointer to descriptor #3.
get application buffer pointer.
to tell application that
packethas arrived.
21510B-B1
287
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