AM79C973VCW AMD [Advanced Micro Devices], AM79C973VCW Datasheet - Page 167
AM79C973VCW
Manufacturer Part Number
AM79C973VCW
Description
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
1.AM79C973VCW.pdf
(304 pages)
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11-10 RES
9
8
7
6
MPSE
FDLSE
PSE
LNKSE
Reserved locations. Written and
read as zeros.
Magic Packet Status Enable.
When this bit is set to 1, a value of
1 is passed to the LEDOUT bit in
this register when Magic Packet
mode is enabled and a Magic
Packet frame is detected on the
network.
Full-Duplex Link Status Enable.
Indicates the Full-Duplex Link
Test Status. When this bit is set,
a value of 1 is passed to the LED-
OUT signal when the Am79C973/
Am79C975 controller is function-
ing in a Link Pass state and full-
duplex operation is enabled.
When
Am79C975 controller is not func-
tioning in a Link Pass state with
full-duplex operation being en-
abled, a value of 0 is passed to
the LEDOUT signal.
Pulse Stretcher Enable. When
this bit is set, the LED illumination
time is extended for each new oc-
currence of the enabled function
for this LED output. A value of 0
disables the pulse stretcher.
Link Status Enable. When this bit
is set, a value of 1 will be passed
to the LEDOUT bit in this register
in Link Pass state.
Read/Write accessible always.
LNKSE is cleared by H_RESET
and is not affected by S_RESET
or setting the STOP bit.
Read/Write accessible always.
MPSE is cleared by H_RESET
and is not affected by S_RESET
or setting the STOP bit.
Read/Write accessible always.
FDLSE is cleared by H_RESET
and is not affected by S_RESET
or setting the STOP bit.
Read/Write accessible always.
PSE is set to 1 by H_RESET and
is not affected by S_RESET or
setting the STOP bit.
the
Am79C973/
P R E L I M I N A R Y
Am79C973/Am79C975
5
4
3
2
1
0
RCVME
XMTE
RES
RCVE
RES
COLE
Receive Match Status Enable.
Receive Status Enable. When
When this bit is set, a value of 1 is
passed to the LEDOUT bit in this
register when there is receive ac-
tivity on the network that has
passed the address match func-
tion for this node. All address
matching modes are included:
physical, logical filtering, broad-
cast, and promiscuous.
Read/Write accessible always.
RCVME is cleared by H_RESET
and is not affected by S_RESET
or setting the STOP bit.
Transmit Status Enable. When
this bit is set, a value of 1 is
passed to the LEDOUT bit in this
register when there is transmit
activity on the network.
Read/Write accessible always.
XMTE is cleared by H_RESET
and is not affected by S_RESET
or setting the STOP bit.
Reserved location. Written and
read as zeros.
this bit is set, a value of 1 is
passed to the LEDOUT bit in this
register when there is receive ac-
tivity on the network.
Read/Write accessible always.
RCVE is set to 1 by H_RESET
and is not affected by S_RESET
or setting the STOP bit.
Reserved location. Written and
read as zeros.
Collision Status Enable. When
this bit is set, a value of 1 is
passed to the LEDOUT bit in this
register when there is collision
activity on the network.
Read/Write accessible always.
COLE is cleared by H_RESET
and is not affected by S_RESET
or setting the STOP bit.
167
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