ZL50031QEG1 ZARLINK [Zarlink Semiconductor Inc], ZL50031QEG1 Datasheet - Page 65
ZL50031QEG1
Manufacturer Part Number
ZL50031QEG1
Description
Flexible 4 K x 2 K Channel Digital Switch with H.110 Interface and 2 K x 2 K Local Switch
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet
1.ZL50031QEG1.pdf
(74 pages)
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† Characteristics are over recommended operating conditions unless otherwise stated.
‡ Typical figures are at 25°C and are for design aid only: not guaranteed and not subject to production testing.
* Note 1: To meet the H.110 output timing requirement, the output delay time can be reduced further by programming the backplane output
* Note 2: High Impedance is measured by pulling to the appropriate rail with R
AC Electrical Characteristics
advancement registers (BOA0 - 3).
1
2
3
4
5
BSTio0-31 Input Data Sample Point
BSTio0-31 Input Setup Time
BSTio0-31 Input Hold Time
BSTio0-31 Output Delay
Active to Active
Per Channel boundary HiZ
Backplane output
Backplane input
BSTio (8 Mbps)
BSTio (8 Mbps)
FRAME_A_io,
FRAME_B_io
(8.192 MHz)
C8_A_io,
C8_B_io
(INPUT)
(INPUT)
Figure 30 - Backplane Serial Stream Timing when the Data Rate is 8 Mbps
Characteristic
†
Ch127
Ch127
- Backplane Serial Streams with Date Rate of 8 Mbps
Bit 6
Bit 6
t
DOZ8
t
Ch127
ZDO8
Bit 7
t
SAMP8
Ch127
Bit 7
Zarlink Semiconductor Inc.
t
SAMP8
t
Sym.
t
t
t
t
DOD8
DOZ8
ZDO8
CIS8
CIH8
t
ZL50031
CIS8
Bit 0
Ch 0
Bit 0
Ch 0
65
Min.
91.5
12.5
12.5
t
-6.5
CIH8
L
, with timing corrected to cancel the time taken to discharge C
‡
t
Bit 1
Ch 0
DOD8
Bit 1
Ch 0
Typ.
91.5
10
10
‡
Bit 2
Ch 0
Max.
Bit 2
Ch 0
91.5
12.5
Bit 3
Ch 0
Units
ns
ns
ns
ns
ns
ns
Bit 3
Ch 0
C
R
Note 2
Test Conditions
Bit 4
Ch 0
L
L
=1 K, C
= 30 pF, Note 1
Bit 4
Ch 0
Data Sheet
L
=30 pF,
V
V
TT
TT
L
.
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