ZL30107GGG ZARLINK [Zarlink Semiconductor Inc], ZL30107GGG Datasheet

ZL30107GGG

Manufacturer Part Number

ZL30107GGG

Description

GbE Line Card Synchronizer

Manufacturer

ZARLINK [Zarlink Semiconductor Inc]

Datasheet

1.ZL30107GGG.pdf (6 pages)

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A full Data Sheet is available to qualified customers. To

TimingandSync@zarlink.com.

Features

•

Single chip low cost solution for synchronizing an

Ethernet PHY to a standard telecom clock

Generates an IEEE 802.3 jitter compliant 25 MHz

Gigabit Ethernet output clock

Supports three modes of operation:

Asynchronous Freerun, Synchronous, and

Asynchronous Holdover

Defaults in Asynchronous Freerun mode

In Asynchronous Freerun mode, the DPLL

generates an output clock with a frequency

accuracy equal to frequency accuracy of the

external crystal oscillator (XO) or a low cost

crystal (XTAL)

In Synchronous mode, the DPLL automatically

synchronizes to one of a pre-defined set of

frequencies including 2 kHz, 8 kHz, 64 kHz,

1.544 MHz, 2.048 MHz, 6.48 MHz, 8.192 MHz,

16.384 MHz, 19.44 MHz, 38.88 MHz, 77.76 MHz.

please

Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.

send

REF0

REF1

REF2

X1/CLK X2

Figure 1 - Block Diagram

Zarlink Semiconductor Inc.

DPLL

uP I/F

LOCK

•

Applications

•

Configurable to accept a 25 MHz input reference

Automatic entry into Asynchronous Holdover

mode when all input references fail

Input reference is manually selectable through the

serial (SPI) interface

Hitless input reference switching

Lock indicator pin

Input reference status monitors

Programmable loop bandwidth of 14 Hz, 28 Hz, or

890 Hz

Ethernet Line Cards Supporting Synchronous

Transmission

ZL30107GGG

ZL30107GGG2 64 Pin CABGA*

GbE Line Card Synchronizer

APLL

*Pb Free Tin/Silver/Copper

Ordering Information

-40

64 Pin CABGA

C to +85

Shortform Data Sheet

CLK

ZL30107

Trays

March 2007

Related parts for ZL30107GGG

ZL30107GGG Summary of contents

Page 1

... Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc. Copyright 2007, Zarlink Semiconductor Inc. All Rights Reserved. GbE Line Card Synchronizer email to ZL30107GGG ZL30107GGG2 64 Pin CABGA* *Pb Free Tin/Silver/Copper • Configurable to accept a 25 MHz input reference • Automatic entry into Asynchronous Holdover mode when all input references fail • ...

Page 2

ZL30107 REF1 IC B REF0 IC IC REF2 C SCK LOCK ...

Page 3

Pin Description I/O Pin # Name Type B1 REF0 I Reference Inputs (LVCMOS, Schmitt Trigger). These reference inputs are d A3 REF1 used for synchronizing the PLL. These pins are internally pulled down to Vss. B4 REF2 D8 CLK O ...

Page 4

I/O Pin # Name Type H6 IC Internal Connection. Connect to ground Connection. Leave unconnected Positive Supply Voltage. +3 ...

Page 5

...

Page 6

For more information about all Zarlink products Information relating to products and services furnished herein by Zarlink Semiconductor Inc. or its subsidiaries (collectively “Zarlink”) is believed to be reliable. However, Zarlink assumes no liability for errors that may appear in ...

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