ML22Q54 OKI [OKI electronic componets], ML22Q54 Datasheet
ML22Q54
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ML22Q54 Summary of contents
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... ROMs are available in the ML2250 family depending upon the total playback time length. ML22Q54 The ML22Q54 is a speech synthesis device with a 4-Mbit flash memory built in. The voice data can be easily written to the flash memory using a special tool. The on-chip flash memory product is suitable for the diversified low volume production or short delivery time applications that the on-chip mask ROM product cannot support ...
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... None Simultaneous Available channels 1 and 2 4 sampling cycles 3 sampling cycles — 1 phrase ML2250 family Silence interval FEDL2250DIGEST-01 ML2252/54-XXX, ML22Q54 ML2210 family Serial 4-bit ADPCM 8-bit PCM 8-bit non-linear PCM 247 4.0/5.3/6.4/8.0/10.7/ 12.8/16.0 4.096 MHz Current type: 12 bits Secondary comb filter ...
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... Maximum playback time length (sec) (In 4-bit ADPCM2) = 4.0 kHz F = 6.4 kHz F = 8.0 kHz F SAM SAM 64.5 40.3 32.2 261.1 163.2 130.5 261.1 163.2 130.5 4.096 MHz 4.0 kHz, 5.3 kHz, 6.4 kHz, 8.0 kHz, 10.7 kHz, 12.8 kHz, 16.0 kHz, 21.3 kHz, 25.6 kHz, 32.0 kHz, 42.7 kHz, 48 kHz 256 phrases Digital filter (ML2252-XXXGA/ML2254-XXXGA/ML22Q54GA-MC) FEDL2250DIGEST-01 ML2252/54-XXX, ML22Q54 = 16 kHz kHz SAM SAM 16.1 8.0 65.2 32.6 65.2 32.6 3/31 ...
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Multiplexer NCR1/NDR NCR2/DL BUSY1 BUSY2/ERR SERIAL 16bit(ML2252) D7/DI 18bit(ML2254) D6/SCK Address Controller D5/DO CPU Interface Phrase Address D1 Register Command Register RD XT OSC XT TEST TESTO1 TESTO2 1Mbit(ML2252) 16 2bit ...
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NCR1/NDR NCR2/DL 18bit Multiplexer BUSY1 BUSY2/ERR SERIAL D7/DI 18bit D6/SCK Address Controller D5/DO D4 CPU D3 Interface Command CS Controller DW RD RD/BY XT OSC Timing Controller XT DV DGND DD 16 4Mbit Flash 2bit ADPCM2 ...
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... OKI Semiconductor PIN CONFIGURATION (TOP VIEW) ML2252/54-XXX BUSY1 3 NCR2/DL 4 NCR1/NDR TESTO1 7 TESTO2 8 RESET 9 TEST 44-pin plastic QFP SERIAL 31 DGND OUT(–)/AOUT 28 OUT(+)/DAO 27 AGND 26 D7/ D6/SCK 23 D5/DO NC: No Connection FEDL2250DIGEST-01 ML2252/54-XXX, ML22Q54 6/31 ...
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... OKI Semiconductor ML22Q54 BUSY1 3 NCR2/DL 4 NCR1/NDR TESTO 7 RD/BY 8 RESET 9 TEST 44-pin plastic QFP SERIAL 31 DGND OUT(–)/AOUT 28 OUT(+)/DAO 27 AGND 26 D7/ D6/SCK 23 D5/DO NC: No Connection FEDL2250DIGEST-01 ML2252/54-XXX, ML22Q54 7/31 ...
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... When RD pin is at “L” level, this D5/DO pin usually outputs “L” level. Works as channel status output pin in the serial interface. When CS and RD pins are “L” level, the status of each channel is output serially from this D5/DO pin in synchronization with SCK clock. FEDL2250DIGEST-01 ML2252/54-XXX, ML22Q54 8/31 ...
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... Keep this pin open. Analog power supply pin. Insert a 0 larger bypass capacitor between this pin and AGND pin. Digital power supply pin. Insert a 0 larger bypass capacitor between this pin and DGND pin. Analog ground pin. Digital ground pin. FEDL2250DIGEST-01 ML2252/54-XXX, ML22Q54 9/31 ...
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... Channel status output pin in the serial input interface. When CS and RD are at “L” level, this D5/DO pin serially outputs the status of each channel in synchronization with SCK clock. When reading data of the built-in flash memory, the pin will output serially the flash memory data. FEDL2250DIGEST-01 ML2252/54-XXX, ML22Q54 10/31 ...
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... Output pin to indicate the automatic erase/write status of the built-in flash memory. Outputs “L” level during erase or programming cycle to indicate the busy state. Goes to “H” level at the end of the erase or programming cycle and enters into the ready state. FEDL2250DIGEST-01 ML2252/54-XXX, ML22Q54 11/31 ...
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... Description Analog power supply pin. Insert a 0 larger bypass capacitor between this pin and AGND pin. Digital power supply pin. Insert a 0 larger bypass capacitor between this pin and DGND pin. Analog ground pin. Digital ground pin. FEDL2250DIGEST-01 ML2252/54-XXX, ML22Q54 12/31 ...
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... ABSOLUTE MAXIMUM RATINGS Parameter Symbol Power supply voltage V DD Input voltage V IN Storage temperature T STG RECOMMENDED OPERATING CONDITIONS (3 V) ML2252/54-XXX, ML22Q54 Parameter Symbol Power supply voltage V DD Operating temperature T OP Master clock frequency f OSC RECOMMENDED OPERATING CONDITIONS (5 V) ML2252/54-XXX ...
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... MHz at no load Read Operation — (ML22Q54) = 4.096 MHz at no load — (ML22Q54 –40 to +70°C — –40 to +85°C — +70°C — (ML22Q54) FEDL2250DIGEST-01 ML2252/54-XXX, ML22Q54 Typ. Max. Unit — — V — 0. — — V — ...
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... IL = 4.096 MHz at no load OSC — OPTANA = “L” = 4.096 MHz at no load OSC — OPTANA = “H” –40 to +70°C — –40 to +85°C — FEDL2250DIGEST-01 ML2252/54-XXX, ML22Q54 Typ. Max. Unit V — — — 0 — — ...
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... Condition Min. — output load 0.5 — – –0 — kHz LPF used when — OPTANA pin = “H”. FEDL2250DIGEST-01 ML2252/54-XXX, ML22Q54 Typ. Max. Unit — — k — AV –0 — — V — 0.4 V — ...
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... To read the channels status, pins CS and RD are made “L” level. By doing so, the status signals (NCR1, NCR2, BUSY1, BUSY2) of each channel are output to D3 through D0 pins pins usually output “L” level. Command and Data Input Timing (I/O) ML2252/54-XXX, ML22Q54 SERIAL = “H” Serial interface D (I) Serial data input pin SCK (I) ...
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... In other states, the NCR signal outputs “H” level. Data Stable Output status signal “L” level “L” level “L” level “L” level Channel 2 busy output ( BUSY2 ) Channel 1 busy output ( BUSY1 ) Channel 2 NCR output (NCR2) Channel 1 NCR output (NCR1) FEDL2250DIGEST-01 ML2252/54-XXX, ML22Q54 18/31 ...
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... WR pin. Command and Data Input Timings SCK Rising Edge Operation CS ( (I) DI (I) SCK (I) SCK falling Edge Operation CS ( (I) DI (I) SCK (I) ML2252/54-XXX, ML22Q54 FEDL2250DIGEST-01 19/31 ...
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... The status signals in the parallel interface are output pins sequentially from D7. Status Read Timing SCK Rising Edge Operation CS (I) RD (I) SCK (I) Hi-Z DO (O) SCK Falling Edge Operation CS (I) RD (I) SCK (I) Hi FEDL2250DIGEST-01 ML2252/54-XXX, ML22Q54 Hi-Z Hi-Z 20/31 ...
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... Inputs voice data from the CPU I/F to play back. Performs data read/write/erase of the built-in flash memory. This command cannot be used while the playback is going on. (Applicable to the ML22Q54.) FEDL2250DIGEST-01 ML2252/54-XXX, ML22Q54 Description 21/31 ...
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... Meanwhile, after a command is input, the NCR and BUSY signals of all channels are at “L” level during the processing of the command. To master clock inside the device 1 M approx. XT Channel status NCR1 NCR2 FEDL2250DIGEST-01 ML2252/54-XXX, ML22Q54 BUSY1 BUSY2 22/31 ...
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... Algorithm which plays back mid-range of waveform as 10-bit equivalent voice quality. Normal 8-bit PCM algorithm Normal 16-bit PCM algorithm 0x00000 Voice control area (16 Kbit Fixed) 0x007FF 0x00800 Test area 0x00807 0x00808 Voice area Phrase Control Table area Depends on creation of ROM data. FEDL2250DIGEST-01 ML2252/54-XXX, ML22Q54 Feature 23/31 ...
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... OKI Semiconductor Built-in ROM Usage Prohibited Area (Applies to ML2252/54-XXX, ML22Q54) The 8 bytes between the voice control area and the voice area in the ROM is the prohibited area for use. The voice data are stored automatically behind 00808(HEX) address by using the development tool (AR762, AR203, AR204) when creating the ROM data ...
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... End of the Other Channel ··· (Group 1) ··· (Group 2) ··· (Group 16.0 kHz fs = 25.6 kHz (Invalid. Played back 32.0 kHz.) Normal playback if not played back 16.0 kHz other channel 25.6 kHz (Valid) End of channel 1 FEDL2250DIGEST-01 ML2252/54-XXX, ML22Q54 25/31 ...
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... Example 1: Phrases Using the Phrase Control Table Function Phrase 1 A Phrase 2 A Phrase 3 E Phrase 4 E Phrase 5 A Example 2: Example of ROM Data in case Example 1 Converted to ROM Silence Address control area Editing area FEDL2250DIGEST-01 ML2252/54-XXX, ML22Q54 26/31 ...
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... – Speaker amplifier 1.412 stands for cutoff frequency of LC filter. C FEDL2250DIGEST-01 ML2252/54-XXX, ML22Q54 27/31 ...
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... OKI Semiconductor APPLICATION CIRCUIT EXAMPLE (ML2252/54-XXX, ML22Q54) MCU 30 pF 4.096 MHz 30 pF RESET D7-0 8 NCR1 NCR2 BUSY1 BUSY2 SERIAL Speaker amplifier AOUT OPTANA XT XT FEDL2250DIGEST-01 ML2252/54-XXX, ML22Q54 28/31 ...
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... Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). FEDL2250DIGEST-01 ML2252/54-XXX, ML22Q54 (Unit: mm) Package material Epoxy resin Lead frame material ...
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... OKI Semiconductor REVISION HISTORY Document Date No. FEDL2250DIGEST-01 Oct. 15, 2002 Page Previous Current Edition Edition – – Final edition 1 FEDL2250DIGEST-01 ML2252/54-XXX, ML22Q54 Description 30/31 ...
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... The purchaser assumes the responsibility of determining the legality of export of these products and will take appropriate and necessary steps at their own expense for these part of the contents contained herein may be reprinted or reproduced without our prior permission. FEDL2250DIGEST-01 ML2252/54-XXX, ML22Q54 Copyright 2002 Oki Electric Industry Co., Ltd. 31/31 ...