AK4640_05 AKM [Asahi Kasei Microsystems], AK4640_05 Datasheet - Page 65

• Manufacturer Part Number: AK4640_05
• Description: 16-Bit ?? CODEC with MIC/HP/SPK-AMP
• Manufacturer: AKM [Asahi Kasei Microsystems]

ASAHI KASEI
When ADC, DAC, ALC1 and ALC2 are used, the clocks (MCKI, BICK and LRCK) must be supplied.
MS0273-E-02
(Addr:04H, D5-4)
Clock Set up
BICK, LRCK
1. When X'tal is used in PLL mode. (Slave mode)
<Example>
(Addr:01H, D7)
(Addr:01H, D6)
(Addr:01H, D5)
(Addr:04H, D3)
MCKPD bit
PS1-0 bits
PMXTL bit
PMPLL bit
MCKO pin
MCKO bit
(Slave Mode)
(1) Release the pull-down of the XTI pin : MCKPD bit = “1” → “0” and power-up the X’tal oscillator: PMXTL bit
(2) Power-up the PLL : PMPLL bit = “0” → “1”
(3) Enable MCKO output : MCKO bit = “0” → “1”
(4) MCKO is output after PLL becomes stable.
(5) Input BICK and LRCK synchronized with the MCKO output.
(6) Set the MCKO output frequency (PS1-0 bits)
= “0” → “1”
The PLL should be powered-up after the X’tal oscillator becomes stable. If X'tal and PLL are powered-up at
the same time, the PLL does not start. It takes X’tal oscillator 20ms(typ) to be stable after PMXTL bit= “1”.
This time depends on X’tal. PLL needs 40ms lock time the PMPLL bit = “0” → “1”.
If PS1-0 bits are changed before LRCK is input, MCKO is not output. PS1-0 bits should be changed after
LRCK is input.
(1)
20ms(typ)
(2)
(3)
00
40ms(max)
Figure 47. Clock Set Up Sequence(1)
(4)
(5)
- 65 -
Output
(6)
Input
XX
E x a m p le :
A u d io I/F F o r m a t : I
B IC K f re q u e nc y a t M a s te r M o d e : 6 4 f s
I np u t M a s t e r C lo c k S e le c t a t P L L M o d e : 1 1 .2 8 9 6 M H z
O utp u t M a s te r C lo c k F re q ue n c y : 6 4 f s
(5 ) B IC K a n d L R C K in p u t s ta rt
(1 ) A d d r:0 1 H , D a ta :4 0 H
(2 ) A d d r:0 1 H , D a ta :6 0 H
(3 ) A d d r:0 4 H , D a ta 4 A H
(4 ) M C K O o u tp u t s ta rts
(6 ) A d d r:0 4 H , D a ta 6 A H
2
S
[AK4640]
2005/04