AK4632VN AKM [Asahi Kasei Microsystems], AK4632VN Datasheet - Page 67

• Manufacturer Part Number: AK4632VN
• Description: 16-Bit ?? Mono CODEC with ALC & MIC/SPK/Video-AMP
• Manufacturer: AKM [Asahi Kasei Microsystems]

ASAHI KASEI
Master clock can be stopped when ADC, DAC, ALC1, ALC2 and IPGA don’t operate.
MS0396-E-00
External MCKI
External BICK
External FCK
Stop of Clock
1. In case of PLL Master Mode
(Addr:01H, D0)
(Addr:01H, D1)
MCKPD bit
(Addr:01H, D2)
<Example>
2. When an external clocks (FCK or BICK pins) are used in PLL Slave Mode.
(Addr:01H, D0)
<Example>
PMPLL bit
PMPLL bit
MCKO bit
(1) Power down PLL: PMPLL bit = “1” → “0”
(2) Stop MCKO clock: MCKO bit = “1” → “0”
(3) Pull down the MCKI pin: MCKPD bit = “0” → “1”
(4) Stop an external master clock.
(1) Power down PLL: PMPLL bit = “1” → “0”
(2) Stop the external BICK and FCK clocks
When the external master clock becomes Hi-Z, MCKI pin should be pulled down.
"H" or "L"
Input
Input
Input
(1)
(1)
(2)
(3)
(4)
(2)
(2)
Figure 56. Clock Stopping Sequence (1)
Figure 57. Clock Stopping Sequence (2)
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Example:
Example
Audio I/F Format: DSP Mode, BCKP = MSBS = “0”
Input Master Clock Select at PLL Mode : 11.2896MHz
BICK frequency at Master Mode : 64fs
Sampling Frequency:8kHz
Audio I/F Format : DSP Mode, BCKP = MSBS = “0”
PLL Reference clock: BICK
BICK frequency: 64fs
Sampling Frequency: 8kHz
(1) (2) (3) Addr:01H, Data:0CH
Stop an external MCKI
(2) Stop the external clocks
(1) Addr:01H, Data:04H
[AK4632]
2005/06