AK4632VN AKM [Asahi Kasei Microsystems], AK4632VN Datasheet - Page 64

• Manufacturer Part Number: AK4632VN
• Description: 16-Bit ?? Mono CODEC with ALC & MIC/SPK/Video-AMP
• Manufacturer: AKM [Asahi Kasei Microsystems]

ASAHI KASEI
MS0396-E-00
DVOL7-0 bits
(Addr:0AH, D7-0)
1. In case of using an external mute circuit.(Compatible with AK4536/AK4630)
(Addr:02H, D4)
MONO LINEOUT
(Addr:00H, D2)
(Addr:00H, D3)
<Example>
PMDAC bit
FS3-0 bits
DACA bit
AOUT pin
PMAO bit
(Addr:05H,
D5,D2-0)
At first, clocks should be supplied according to “Clock Set Up” sequence.
(1) Set up a sampling frequency (FS3-0 bits). When the AK4632 is PLL mode, DAC and Mono Line Amp should
(2) Set up the path of “DAC
(3) Set up the digital volume (Addr: 0AH)
(4) Power Up of DAC and Mono Line Amp: PMDAC bit = PMAO bit = “0” → “1”
(5) Power Down of DAC and Mono Line Amp: PMDAC bit = PMAO bit = “1” → “0”
(6) Disable the path of “DAC
be powered-up in consideration of PLL lock time after a sampling frequency is changed.
DACA bit: “0” → “1”
After DAC is powered-up, the digital volume changes from default value (0dB) to the register setting value by
the soft transition.
When DAC and Mono Line Amp are powered-up, the pop noise occurs from AOUT pin. Therefore AOUT pin
should be muted by external circuit.
When DAC and Mono Line Amp are powered-down, the pop noise occurs from AOUT pin. Therefore AOUT
pin should be muted by external circuit.
DACA bit: “1” → “0”
XXXX
00011000
Hi-Z
(2)
(1)
(3)
(4)
Mono Line Amp”
Mono Line Amp”
Figure 53. Mono Lineout Sequence
Normal Output
XXXXXXX
XXXX
- 64 -
(5)
Hi-Z
(6)
Example:
PLL, Master Mode
Audio I/F Format :DSP Mode, BCKP=MSBS= “0”
Sampling Frequency: 8kHz
Digital Volume: -8dB
(1) Addr:05H, Data:00H
(3) Addr:0AH, Data:28H
(2) Addr:02H, Data:10H
(5) Addr:00H, Data:40H
(6) Addr:02H, Data:00H
(4) Addr:00H, Data:4CH
Playback
[AK4632]
2005/06