EPC110 EPC [Espros Photonics corp], EPC110 Datasheet - Page 11

• Manufacturer Part Number: EPC110
• Description: Fully integrated configurable light barrier driver & receiver
• Manufacturer: EPC [Espros Photonics corp]

1 The non-volatile memory is a one-time-programmable memory (OTP). Once the memory is programmed, the programmed values cannot be
Parameters
The parameters are defining the functionality of the epc110. The big variety of possible settings allows to cover a wide range of applications.
The devices contains a memory to store the application parameters. They are stored into 16bit registers. The registers are organized into
2 blocks: a volatile and a non-volatile one.
Parameter Memory Organization (epc110)
The following classes of data are stored for each device:
This data can be permanently stored in a read-only memory (ROM)
(except the chip ID) is copied from the ROM to the RAM. During operation, the data from the RAM is used. Both memories are organized in
16 registers at 16 bits each. The data can be accessed on a 16-bit register base.
If a register has been burned (=stored into the ROM) the first bit is set: FUSEBIT = 1. If VMOD = 1 is selected, the register cannot be modified
any more nor in RAM nor in ROM area. For VMOD = 0 the RAM area is still accessible.
So far the chip can be operated in two different modes:
The following table shows the memory organization:
As shown in the table above, registers 0 – 3 are used for configuring the chip in the application. Before the devices can be used in a final light-
barrier system, the required application parameters of the chip in the system have to be stored into the device memory.
The following table shows the allocation of the available parameters in the memory of the epc110:
© 2011 ESPROS Photonics Corporation
Characteristics subject to change without notice
overwritten anymore.
•
•
•
•
Non-Volatile Memory Address Range
ROM RAM
10
11
12
13
14
15
0
1
2
3
4
5
6
7
8
9
Application parameters
Unique chip ID and chip adjustments (factory set)
Fix-parameter mode VMOD = 1: e.g. as standalone or pre-configured device
Operated with not modifiable data from RAM, which are stored permanently in ROM.
Dynamic mode VMOD = 0: e.g. for adaptive systems, dynamic systems
Operated with modifiable data from RAM. The SPI interface allows to modify these data in the RAM area at any time on the fly.
At power up these data are loaded from the permanent stored data in the ROM. If the run-time configuration differs from the data set
stored in the ROM, it has to be restored after each power-up again by the external micro-processor over the SPI interface.
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
VMODE
15
0
(Register no.)
TPER
8 - 15
0 - 3
4 - 6
14
0
7
-
MODE
13
0
12
0
11
1
1
Volatile Memory Address Range
DEC
Figure 12: Detailed memory map epc110
10
0
0
Table 3: Memory map overview
(Register no.)
16 - 19
20 - 22
24 - 31
9
0
1
Factory use only
23
Lot no. MSB
Revision no.
-
Lot no. LSB
no function
no function
no function
don't use
don't use
don't use
don't use
don't use
Chip ID
8
0
0
0
Bit #
1
11
and is mirrored in a volatile memory (RAM). At power up, the data
7
0
0
1
6
0
Description
Application parameters
Trim values, factory set
Device Address (not applicable)
Chip ID, factory set
For factory test purpose. Read only.
SENSH
5
0
INC
4
TPULSE
3
SENSN
2
0
POL FUSEBIT
1
0
Datasheet epc110 - V2.1
FUSEBIT
FUSEBIT
FUSEBIT
FUSEBIT
FUSEBIT
FUSEBIT
FUSEBIT Device Address
FUSEBIT
FUSEBIT
FUSEBIT
FUSEBIT
FUSEBIT
FUSEBIT
FUSEBIT
FUSEBIT
0
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epc110
Application
parameters
Trimming
Chip ID