M37212 Mitsubishi, M37212 Datasheet - Page 41

• Manufacturer Part Number: M37212
• Description: SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
• Manufacturer: Mitsubishi

8.6.10 Example of Master Transmission
An example of master transmission in the standard clock mode, at
the SCL frequency of 100 kHz and in the ACK return mode is shown
below.
Rev. 1.0
Set a slave address in the high-order 7 bits of the I
register (address 00D8
Set the ACK return mode and SCL = 100 kHz by setting “85
the I
Set “10
SCL at the HIGH.
Set a communication enable status by setting “48
control register (address 00DA
Set the address data of the destination of transmission in the high-
order 7 bits of the I
“0” in the least significant bit.
Set “F0
a START condition. At this time, an SCL for 1 byte and an ACK
clock automatically occurs.
Set transmit data in the I
this time, an SCL and an ACK clock automatically occurs.
When transmitting control data of more than 1 byte, repeat step
Set “D0
ACK is not returned or transmission ends, a STOP condition will
be generated.
2
C clock control register (address 00DB
16
16
16
” in the I
” in the I
” in the I
2
2
2
C status register (address 00D9
C status register (address 00D9
C status register (address 00D9
2
C data shift register (address 00D7
16
2
C data shift register (address 00D7
) and “0” in the RBW bit.
16
).
M37212M4/M8–XXXSP, M37212M6–XXXSP/FP
16
).
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
16
16
16
) and hold the
16
). After this, if
) to generate
2
” in the I
C address
16
) and set
16
16
). At
” in
2
C
.
8.6.11 Example of Slave Reception
An example of slave reception in the high-speed clock mode, at the
SCL frequency of 400 kHz, in the ACK non-return mode, using the
addressing format, is shown below.
•When all transmitted address are“0” (general call):
Set dummy data in the I
When receiving control data of more than 1 byte, repeat step
When a STOP condition is detected, the communication ends.
Set a slave address in the high-order 7 bits of the I
register (address 00D8
Set the no ACK clock mode and SCL = 400 kHz by setting “25
the I
Set “10
SCL at the HIGH.
Set a communication enable status by setting “48
control register (address 00DA
When a START condition is received, an address comparison is
made.
•When the transmitted addresses match the address set in
•In the cases other than the above:
AD0 of the I
an interrupt request signal occurs.
ASS of the I
an interrupt request signal occurs.
AD0 and AAS of the I
to “0” and no interrupt request signal occurs.
2
C clock control register (address 00DB
16
” in the I
2
2
C status register (address 00D9
C status register (address 00D9
with ON-SCREEN DISPLAY CONTROLLER
2
C status register (address 00D9
MITSUBISHI MICROCOMPUTERS
2
16
C status register (address 00D9
2
C data shift register (address 00D7
) and “0” in the RBW bit.
M37212EFSP/FP
16
).
16
16
).
16
) is set to “1” and
) is set to “1”and
16
) and hold the
16
2
” in the I
C address
16
) are set
16
16
:
” in
).
2
41
C
.