74LVT573D,118 NXP Semiconductors, 74LVT573D,118 Datasheet - Page 3

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74LVT573D,118

Manufacturer Part Number
74LVT573D,118
Description
IC OCTAL D TRANSP LATCH 20SOIC
Manufacturer
NXP Semiconductors
Series
74LVTr
Datasheet

Specifications of 74LVT573D,118

Logic Type
D-Type Transparent Latch
Circuit
8:8
Output Type
Tri-State
Voltage - Supply
2.7 V ~ 3.6 V
Independent Circuits
1
Delay Time - Propagation
6.3ns
Current - Output High, Low
32mA, 64mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74LVT573D-T
74LVT573D-T
935170700118
NXP Semiconductors
5. Pinning information
74LVT573_4
Product data sheet
Fig 3.
Fig 4.
OE
LE
Logic diagram
Pin configuration for SO20, and (T)SSOP20
D0
GND
OE
D0
D1
D2
D3
D4
D5
D6
D7
D
LATCH
LE
5.1 Pinning
10
1
2
3
4
5
6
7
8
9
1
LE
Q
Q0
74LVTH573
74LVT573
D1
D
LATCH
LE
001aah713
2
LE
Q
Q1
D2
20
19
18
17
16
15
14
13
12
11
D
LATCH
V
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
LE
LE
CC
3
LE
Rev. 04 — 15 September 2008
Q
Q2
D3
D
LATCH
LE
4
LE
Q
Fig 5.
Q3
D4
(1) The die substrate is attached to this pad using
3.3 V octal D-type transparent latch; (3-state)
D
LATCH
LE
conductive die attach material. It can not be used as a
supply pin or input.
Pin configuration for DHVQFN20
5
LE
index area
terminal 1
Q
Q4
D5
D0
D1
D2
D3
D4
D5
D6
D7
D
LATCH
LE
Transparent top view
2
3
4
5
6
7
8
9
6
LE
74LVTH573
Q
74LVT573
GND
Q5
D6
(1)
D
LATCH
LE
7
19
18
17
16
15
14
13
12
74LVT573
LE
Q
001aah712
© NXP B.V. 2008. All rights reserved.
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q6
D7
D
LATCH
LE
8
LE
Q
mna810
3 of 16
Q7

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