74LV573N,112 NXP Semiconductors, 74LV573N,112 Datasheet - Page 5

IC OCTAL D TRANSP LATCH 20-DIP

74LV573N,112

Manufacturer Part Number
74LV573N,112
Description
IC OCTAL D TRANSP LATCH 20-DIP
Manufacturer
NXP Semiconductors
Series
74LVr
Datasheet

Specifications of 74LV573N,112

Logic Type
D-Type Transparent Latch
Package / Case
20-DIP (0.300", 7.62mm)
Circuit
8:8
Output Type
Tri-State
Voltage - Supply
1 V ~ 5.5 V
Independent Circuits
1
Delay Time - Propagation
24ns
Current - Output High, Low
16mA, 16mA
Operating Temperature
-40°C ~ 125°C
Mounting Type
Through Hole
Number Of Circuits
8
Logic Family
LV
Polarity
Non-Inverting
High Level Output Current
- 16 mA
Low Level Output Current
16 mA
Propagation Delay Time
12 ns at 3.3 V
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1 V
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
Through Hole
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-2985-5
935060100112
NXP Semiconductors
7. Limiting values
Table 4.
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
[1]
[2]
8. Recommended operating conditions
Table 5.
Voltages are referenced to GND (ground = 0 V).
[1]
74LV573_3
Product data sheet
Symbol
V
I
I
I
I
I
T
P
Symbol
V
V
V
T
IK
OK
O
CC
GND
stg
amb
t/ V
CC
tot
CC
I
O
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
For DIP20 packages: above 70 C the value of P
For SO20 packages: above 70 C the value of P
For (T)SSOP20 packages: above 60 C the value of P
The static characteristics are guaranteed from V
V
CC
= 1.0 V (with input levels GND or V
Limiting values
Recommended operating conditions
Parameter
supply voltage
input voltage
output voltage
ambient temperature
input transition rise and fall rate
Parameter
supply voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
[1]
CC
).
tot
CC
tot
Conditions
V
V
V
T
derates linearly with 8 mW/K.
derates linearly with 12 mW/K.
= 1.2 V to V
amb
I
O
O
Rev. 03 — 15 April 2009
DIP20
SO20, SSOP20 and TSSOP20
< 0.5 V or V
tot
< 0.5 V or V
= 0.5 V to (V
Conditions
V
V
V
V
= 40 C to +125 C
derates linearly with 5.5 mW/K.
CC
CC
CC
CC
= 1.0 V to 2.0 V
= 2.0 V to 2.7 V
= 2.7 V to 3.6 V
= 3.6 V to 5.5 V
CC
= 5.5 V, but LV devices are guaranteed to function down to
I
O
> V
CC
> V
CC
+ 0.5 V)
CC
+ 0.5 V
+ 0.5 V
Min
1.0
0
0
-
-
-
-
Octal D-type transparent latch; 3-state
40
Typ
3.3
-
-
+25
-
-
-
-
[1]
[1]
[2]
Min
-
-
-
-
-
-
0.5
70
65
Max
5.5
V
V
+125
500
200
100
50
CC
CC
© NXP B.V. 2009. All rights reserved.
74LV573
Max
+7.0
70
-
+150
750
500
20
50
35
Unit
V
V
V
ns/V
ns/V
ns/V
ns/V
C
Unit
V
mA
mA
mA
mA
mA
mW
mW
C
5 of 18

Related parts for 74LV573N,112