74AUP1G373GM,115 NXP Semiconductors, 74AUP1G373GM,115 Datasheet - Page 16

IC LATCH D-TYPE 6-XSON

74AUP1G373GM,115

Manufacturer Part Number
74AUP1G373GM,115
Description
IC LATCH D-TYPE 6-XSON
Manufacturer
NXP Semiconductors
Series
74AUPr
Datasheet

Specifications of 74AUP1G373GM,115

Logic Type
D-Type Transparent Latch
Package / Case
6-XSON (Micropak™), SOT-886
Circuit
1:1
Output Type
Tri-State
Voltage - Supply
0.8 V ~ 3.6 V
Independent Circuits
1
Delay Time - Propagation
2.5ns
Current - Output High, Low
4mA, 4mA
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Number Of Circuits
1
Logic Family
AUP
Polarity
Non-Inverting
High Level Output Current
- 4 mA
Low Level Output Current
4 mA
Propagation Delay Time
22.1 ns at 1.1 V to 1.3 V, 12.3 ns at 1.4 V to 1.6 V
Supply Voltage (max)
3.6 V
Supply Voltage (min)
0.8 V
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-4382-2
74AUP1G373GM-G
74AUP1G373GM-G
935280622115
NXP Semiconductors
Table 11.
[1]
74AUP1G373
Product data sheet
Supply voltage
V
0.8 V to 3.6 V
Fig 11. Test circuit for measuring switching times
CC
For measuring enable and disable times R
Test data is given in
C
R
V
Definitions for test circuit:
R
L
L
T
EXT
Test data
= Load resistance.
= Load capacitance including jig and probe capacitance.
= Termination resistance should be equal to the output impedance Z
= External voltage for measuring switching times.
Load
C
5 pF, 10 pF, 15 pF and 30 pF 5 k or 1 M
L
Table
11.
L
All information provided in this document is subject to legal disclaimers.
G
= 5 k, for measuring propagation delays, setup and hold times and pulse width R
V I
Rev. 4 — 15 July 2010
R
L
[1]
R T
DUT
V
CC
V O
V
t
open
Low-power D-type transparent latch; 3-state
PLH
EXT
C L
o
001aac521
of the pulse generator.
, t
V
EXT
PHL
5 kΩ
R L
t
GND
PZH
74AUP1G373
, t
PHZ
© NXP B.V. 2010. All rights reserved.
t
2  V
PZL
, t
CC
PLZ
L
16 of 25
= 1 M.

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