74AUP1G885GM,125 NXP Semiconductors, 74AUP1G885GM,125 Datasheet - Page 13

• Manufacturer Part Number: 74AUP1G885GM,125
• Description: IC GATE DUAL FUNCTION 8-XQFN
• Manufacturer: NXP Semiconductors
• Series: 74AUPr

Specifications of 74AUP1G885GM,125

• Number Of Circuits: 1
• Package / Case: 8-XQFN
• Logic Type: Configurable Multiple Function
• Number Of Inputs: 3
• Schmitt Trigger Input: Yes
• Output Type: Single-Ended
• Current - Output High, Low: 4mA, 4mA
• Voltage - Supply: 0.8 V ~ 3.6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Product: MUX Gates
• Logic Family: 74AUP
• High Level Output Current: - 4 mA
• Low Level Output Current: 4 mA
• Propagation Delay Time: 17.3 ns
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 0.8 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Operating Temperature Range: - 40 C to + 125 C
• Output Current: 20 mA
• Output Voltage: 3.6 V
• Power Dissipation: 250 mW
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-4388-2; 74AUP1G885GM-G; 74AUP1G885GM-G; 935280766125

NXP Semiconductors
13. Package outline
Fig 8.
74AUP1G885
Product data sheet
VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm
DIMENSIONS (mm are the original dimensions)
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
UNIT
mm
Package outline SOT765-1 (VSSOP8)
VERSION
OUTLINE
SOT765-1
max.
A
1
0.15
0.00
A 1
8
1
Z
0.85
0.60
A 2
y
IEC
e
0.12
A 3
pin 1 index
D
0
0.27
0.17
b p
b p
All information provided in this document is subject to legal disclaimers.
MO-187
0.23
0.08
5
JEDEC
4
c
w
REFERENCES
D
2.1
1.9
M
Rev. 6 — 21 October 2010
(1)
E
2.4
2.2
(2)
c
JEITA
scale
2.5
0.5
e
A
H E
3.2
3.0
A 2
detail X
A 1
0.4
L
H E
E
0.40
0.15
L p
0.21
0.19
Q
5 mm
L
Low-power dual function gate
L p
PROJECTION
EUROPEAN
Q
0.2
v
74AUP1G885
A
(A 3 )
0.13
w
X
θ
v
M
0.1
y
© NXP B.V. 2010. All rights reserved.
A
ISSUE DATE
02-06-07
Z
0.4
0.1
(1)
SOT765-1
8°
0°
θ
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