HY27US08561M HYNIX [Hynix Semiconductor], HY27US08561M Datasheet - Page 30

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HY27US08561M

Manufacturer Part Number
HY27US08561M
Description
256Mbit (32Mx8bit / 16Mx16bit) NAND Flash
Manufacturer
HYNIX [Hynix Semiconductor]
Datasheet

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Note: (1). The time to Ready depends on the value of the pull-up resistor tied to the Ready/Busy pin. See Figures 32, 33 and 34.
Rev 0.7 / Oct. 2004
t
t
t
t
t
CLE
ALE
I/O
WE
RLQV
WHBH
WHBL
WHRL
WLWL
Sym-
CE
Alt.
bol
(2). To break the sequential read cycle, CE must be held High for longer than t
(3). ES = Electronic Signature.
t
READID
Sym-
t
t
t
t
bol
REA
t
WB
WHR
WC
R
(CE Setup time)
(ALE Setup time)
(CLE Setup time)
Read Enable Low to Output Valid
Write Enable High to Ready/Busy High
Write Enable High to Ready/Busy Low
Write Enable High to Read Enable Low
Write Enable Low to Write
Enable Low
tELWL
tALLWL
tCLHWL
(Data Setup time)
tDVWH
Figure 21. Command Latch AC Waveforms
Parameter
256Mbit (32Mx8bit / 16Mx16bit) NAND Flash
Command
Read Enable Access time
Read ES Access time
Write Cycle time
tWLWH
(CE Hold time)
(CLE Hold time)
(Data Hold time)
tWHEH
(ALE Hold time)
tHWCLL
HY27US(08/16)561M Series
HY27SS(08/16)561M Series
EHEL
tWHDX
tWHALH
.
Max
Max
Max
Min
Min
Device
3.3V
50
100
35
10
60
Device
1.8V
60
Unit
ns
us
ns
ns
ns
30

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