AM29F004B AMD [Advanced Micro Devices], AM29F004B Datasheet - Page 10

• Manufacturer Part Number: AM29F004B
• Description: 4 Megabit (512 K x 8-Bit) CMOS 5.0 Volt-only Boot Sector Flash Memory
• Manufacturer: AMD [Advanced Micro Devices]

DEVICE BUS OPERATIONS
This section describes the requirements and use of the
device bus operations, which are initiated through the internal
command register. The command register itself does not
occupy any addressable memory location. The register is
composed of latches that store the commands, along with the
address and data information needed to execute the com-
Legend:
L = Logic Low = V
Note: See the sections on Sector Protection and Temporary Sector
Unprotect for more information.
Requirements for Reading Array Data
To read array data from the outputs, the system must drive
the CE# and OE# pins to V
selects the device. OE# is the output control and gates array
data to the output pins. WE# should remain at V
The internal state machine is set for reading array data upon
device power-up. This ensures that no spurious alteration of
the memory content occurs during the power transition. No
command is necessary in this mode to obtain array data.
Standard microprocessor read cycles that assert valid
addresses on the device address inputs produce valid data
on the device data outputs. The device remains enabled for
read access until the command register contents are altered.
See
Refer to the AC Read Operations table for timing specifica-
tions and to the Read Operations Timings diagram for the
timing waveforms. I
sents the active current specification for reading array data.
Writing Commands/Command Sequences
To write a command or command sequence (which includes
programming data to the device and erasing sectors of
memory), the system must drive WE# and CE# to V
OE# to V
An erase operation can erase one sector, multiple sectors, or
the entire device. The Sector Address Tables indicate the
address space that each sector occupies. A “sector address”
consists of the address bits required to uniquely select a
sector. See the
details on erasing a sector or the entire chip, or sus-
pending/resuming the erase operation.
After the system writes the autoselect command sequence,
the device enters the autoselect mode. The system can then
read autoselect codes from the internal register (which is
8
Read
Write
CMOS Standby
TTL Standby
Output Disable
Temporary Sector Unprotect (See Note)
Reading Array Data on page 13
IH
.
IL
Command Definitions on page 13
, H = Logic High = V
CC1
Operation
in the DC Characteristics table repre-
IL
. CE# is the power control and
IH
A D V A N C E
, V
Table 1. Am29F004B Device Bus Operations
for more information.
ID
= 12.0 ± 0.5 V, X = Don’t Care, D
IH
.
section for
V
IL
CC
, and
Am29F004B
CE#
± 0.5 V
H
X
L
L
L
I N F O R M A T I O N
mand. The contents of the register serve as inputs to the
internal state machine. The state machine outputs dictate the
function of the device. The appropriate device bus operations
table lists the inputs and control levels required, and the
resulting output. The following subsections describe each of
these operations in further detail.
separate from the memory array) on DQ7–DQ0. Standard
read cycle timings apply in this mode. Refer to the
Mode on page 10
tions for more information.
I
c u r r e n t s p e c i f i c a t i o n f o r t h e w r i t e m od e. T h e
Characteristics on page 24
tion tables and timing diagrams for write operations.
Program and Erase Operation Status
During an erase or program operation, the system may check
the status of the operation by reading the status bits on DQ7–
DQ0. Standard read cycle timings and I
apply. Refer to
information, and to each AC Characteristics section for timing
diagrams.
Standby Mode
When the system is not reading or writing to the device, it can
place the device in the standby mode. In this mode, current
consumption is greatly reduced, and the outputs are placed
in the high impedance state, independent of the OE# input.
The device enters the CMOS standby mode when CE# pin is
held at V
range than V
when CE# pin is held at V
access time (t
of these standby modes, before it is ready to read data.
If the device is deselected during erasure or programming,
the device draws active current until the operation is
completed.
In the DC Characteristics tables, I
current specification.
CC2
IN
in the DC Characteristics table represents the active
OE#
H
H
= Data In, D
L
X
X
X
CC
± 0.5 V. (Note that this is a more restricted voltage
IH
CE
WE#
.) The device enters the TTL standby mode
Write Operation Status on page 17
) for read access when the device is in either
H
H
L
X
X
X
OUT
and Autoselect Command Sequence sec-
= Data Out, A
IH
A0–A18
section contains timing specifica-
. The device requires standard
A
A
X
X
X
X
IN
IN
CC3
IN
= Address In
represents the standby
CC
read specifications
DQ0–DQ7
High-Z
High-Z
High-Z
D
D
OUT
X
Autoselect
IN
for more
8/5/05
AC