EVAL-AD5620EB AD [Analog Devices], EVAL-AD5620EB Datasheet - Page 7

• Manufacturer Part Number: EVAL-AD5620EB
• Description: Single, 12-/14-/16-Bit nanoDAC with 5 ppm/C On-Chip Reference in SOT-23
• Manufacturer: AD [Analog Devices]

TIMING CHARACTERISTICS
All input signals are specified with tr = tf = 1 ns/V (10% to 90% of V
V
Table 3.
Parameter
t
t
t
t
t
t
t
t
t
t
1
1
2
3
4
5
6
7
8
9
10
Maximum SCLK frequency is 30 MHz at V
1
DD
= 2.7 V to 5.5 V; all specifications T
V
50
13
13
13
5
4.5
0
50
13
0
SYNC
SCLK
DD
DIN
= 2.7 V to 3.6 V
LSB = DB0
MSB = DB23 FOR AD5660;
MSB = DB15 FOR AD5620/AD5640
t
8
DD
t
10
= 3.6 V to 5.5 V and 20 MHz at V
Limit at T
MSB
MIN
t
to T
4
t
5
MIN
V
33
13
13
13
5
4.5
0
33
13
0
t
MAX
6
DD
, T
, unless otherwise noted.
= 3.6 V to 5.5 V
MAX
t
3
Figure 2. Serial Write Operation
t
Rev. A | Page 7 of 24
1
t
DD
2
= 2.7 V to 3.6 V.
DD
LSB
) and timed from a voltage level of (V
t
7
t
9
ns min
Unit
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
Conditions/Comments
SCLK cycle time
SCLK high time
SCLK low time
SYNC to SCLK falling edge set-up time
Data set-up time
Data hold time
SCLK falling edge to SYNC rising edge
Minimum SYNC high time
SYNC rising edge to SCLK fall ignore
SCLK falling edge to SYNC fall ignore
AD5620/AD5640/AD5660
IL
+ V
IH
)/2. See Figure 2.