EVAL-AD1959EB AD [Analog Devices], EVAL-AD1959EB Datasheet - Page 8

• Manufacturer Part Number: EVAL-AD1959EB
• Description: PLL/Multibit DAC
• Manufacturer: AD [Analog Devices]

AD1959
Bit 11:10
Interpolation
Factor
00 = 8×
01 = 4×
10 = 2×
11 = Not Allowed
Bit 11
PLL2
Power-
Down
0 = On
1 = Power- 1 = Power-
Down
Default Setting.
Default Setting.
Bit 10
PLL1
Power-
Down
0 = On
Down
Bit 9:8
Serial Data
Width
00 = 24 Bits
01 = 20 Bits
10 = 16 Bits
11 = 16 Bits
Bit 9
XTAL
Power-
Down
0 = On
1 = Power-
Down
0.078 (1.98)
0.068 (1.73)
0.008 (0.203)
0.002 (0.050)
B
Volume
14 Bits, Unsigned
14 Bits, Unsigned
Default is full volume.
PIN 1
it 15:2
Bit 8
REF_Div2
Power-
Down
0 = No Div
1 = Div by 2
Bit 7
Output Phase
0 = Noninverted
1 = Inverted
28
1
Dimensions shown in inches and (mm).
28-Lead Small Outline Package (SSOP)
0.0256
(0.65)
BSC
Table II. DAC Volume Registers
Table III. PLL Control Register
0.407 (10.34)
0.397 (10.08)
Table I. DAC Control Register
Bit 7:6
f
00 = 48 kHz
01 = Not
Allowed
10 = 32 kHz
11 = 44.1 kHz
OUTLINE DIMENSIONS
S
0.015 (0.38)
0.010 (0.25)
Bit 6
Soft Mute
0 = No Mute
1 = Muted
(RS-28)
SEATING
PLANE
0.066 (1.67)
14
15
0.07 (1.79)
Bit 5
SCLK1
Select
0 =256
1 =384
0.212 (5.38)
0.205 (5.21)
0.009 (0.229)
0.005 (0.127)
Bit 1:0
SPI Register Address
00 = Left Volume
10 = Right Volume
0.301 (7.64)
0.311 (7.9)
Bit 4
Double
0 = f
1 = 2 × f
Bit 5:4
Serial Data
Format
00 = I
00 = Right Justified
10 = DSP
11 = Left Justified
8
0
S
0.022 (0.558)
0.03 (0.762)
2
S
S
Bit 3
SCLK2
Select
0 = 512 × 4.1 kHz
1 = 512 × f
S
Bit 3:2
De-Emphasis
Filter
00 = None
01 = 44.1 kHz
10 =32 kHz
11 = 48 kH
Mode
0 = Output 11
1 = Input
Bit 2
MCLK
z
Bit 1:0
SPI Register
Address
01
Bit 1:0
SPI
Register
Address