AS7C33128PFS18B-133TQC ALSC [Alliance Semiconductor Corporation], AS7C33128PFS18B-133TQC Datasheet - Page 13
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AS7C33128PFS18B-133TQC
Manufacturer Part Number
AS7C33128PFS18B-133TQC
Description
3.3V 128K x 18 pipeline burst synchronous SRAM
Manufacturer
ALSC [Alliance Semiconductor Corporation]
Datasheet
1.AS7C33128PFS18B-133TQC.pdf
(19 pages)
- Current page: 13 of 19
- Download datasheet (538Kb)
Timing waveform of read/write cycle (ADSP Controlled; ADSC High)
Note: Ý = XOR when LBO = high/no connect; Ý = ADD when LBO = low.
12/10/04; v.1.4
CE0, CE2
Address
ADSP
GWE
Dout
ADV
CLK
Din
CE1
OE
t
ADSPS
DSEL
A1
Q(A1)
Read
t
ADSPH
t
LZC
t
Alliance Semiconductor
CD
Suspend
Q(A1)
Read
t
AS
t
CH
Q(A1)
A2
t
ADVS
Q(A2)
t
Read
AH
t
WS
t
DS
t
HZOE
D(A2)
t
t
t
CYC
CL
DH
Suspend
t
t
D(A 2 )
Write
WH
ADVH
®
A3
Q(A3)
Read
t
LZOE
Q(A 3Ý01 )
t
Burst
Read
ADV
OE
Q(A3)
Q(A 3Ý10 )
AS7C33128PFS18B
Read
Burst
ADV
Q(A3Ý01)
t
OH
Q(A 3Ý11 )
Burst
Read
ADV
Q(A3Ý10)
P. 13 of 19
Q(A3Ý11)
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