GS8160F36BT-5.5V GSI [GSI Technology], GS8160F36BT-5.5V Datasheet - Page 11
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GS8160F36BT-5.5V
Manufacturer Part Number
GS8160F36BT-5.5V
Description
1M x 18, 512K x 32, 512K x 36 18Mb Sync Burst SRAMs
Manufacturer
GSI [GSI Technology]
Datasheet
1.GS8160F36BT-5.5V.pdf
(21 pages)
Notes:
1.
2.
3.
Rev: 1.01 5/2006
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
The diagram shows supported (tested) synchronous state transitions plus supported transitions that depend upon the use of G.
Use of “Dummy Reads” (Read Cycles with G High) may be used to make the transition from read cycles to write cycles without passing
through a Deselect cycle. Dummy Read cycles increment the address counter just like normal read cycles.
Transitions shown in grey tone assume G has been pulsed high long enough to turn the RAM’s drivers off and for incoming data to meet
Data Input Set Up Time.
X
X
CW
First Write
Burst Write
W
Simplified State Diagram with G
W
CW
11/21
W
CR
R
CR
R
Deselect
X
CW
CW
W
W
R
CR
First Read
Burst Read
R
R
CR
X
X
GS8160FxxBT-xxxV
© 2004, GSI Technology
Preliminary