GS74117AX-7I GSI [GSI Technology], GS74117AX-7I Datasheet - Page 6

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GS74117AX-7I

Manufacturer Part Number
GS74117AX-7I
Description
256K x 16 4Mb Asynchronous SRAM
Manufacturer
GSI [GSI Technology]
Datasheet
AC Characteristics
Read Cycle
* These parameters are sampled and are not 100% tested.
Read Cycle 1: CE = OE = V
Rev: 1.02 10/2002
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Byte disable to output in High Z (UB, LB)
Byte enable to output in low Z (UB, LB)
Output disable to output in High Z (OE)
Output enable to output in low Z (OE)
Chip disable to output in High Z (CE)
Chip enable to output in low Z (CE)
Output enable to output valid (OE)
Byte enable access time (UB, LB)
Output hold from address change
Chip enable access time (CE)
Address access time
Read cycle time
Parameter
Address
Data Out
IL
, WE = V
IH
, UB and, or LB = V
Previous Data
Symbol
t
t
t
t
t
OHZ
t
t
OLZ
BLZ
BHZ
t
t
t
t
t
HZ
RC
OE
OH
LZ
AA
AC
AB
*
*
*
*
*
*
t
OH
6/12
Min
7
3
3
0
0
-7
t
AA
IL
Max
3.5
7
7
3
3
3
3
t
RC
Min
8
3
3
0
0
-8
Max
3.5
3.5
3.5
3.5
8
8
4
Data valid
Min
10
3
3
0
0
-10
Max
© 2001, Giga Semiconductor, Inc.
10
10
4
4
5
4
4
Min
12
3
3
0
0
-12
GS74117AX
Max
12
12
5
5
6
5
5
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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