HYS64V16300GU Infineon, HYS64V16300GU Datasheet - Page 16

• Manufacturer Part Number: HYS64V16300GU
• Description: 3.3 V 16M x 64/72-Bit 1 Bank 128MByte SDRAM Module 3.3 V 32M x 64/72-Bit 2 Bank 256MByte SDRAM Module 168-Pin Unbuffered DIMM Modules
• Manufacturer: Infineon

INFINEON Technologies
SPD-Table for PC100 Modules:
Byte#
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
0
1
2
3
4
5
6
7
8
9
Number of SPD bytes
Total bytes in Serial PD
Memory Type
Number of Row Addresses
(without BS bits)
Number of Column Addres-
ses
Number of DIMM Banks
Module Data Width
Module Data Width (cont’d)
Module Interface Levels
SDRAM Cycle Time at CL=3
SDRAM Access time from
Clock at CL=3
Dimm Config
Refresh Rate/Type
SDRAM width, Primary
Error Checking SDRAM data
width
Minimum clock delay for
back-to-back random column
address
Burst Length supported
Number of SDRAM banks
Supported CAS Latencies
CS Latencies
WE Latencies
SDRAM DIMM module
attributes
SDRAM Device Attributes
:General
Min. Clock Cycle Time at
CAS Latency = 2
Max. data access time from
Clock for CL=2
Minimum Clock Cycle Time
at CL = 1
Maximum Data Access Time
from Clock at CL=1
Minimum Row Precharge
Time
Minimum Row Active to Row
Active delay tRRD
Description
Write latency = 0
non buffered/non
CAS latency = 2
Vcc tol +/- 10%
CS latency = 0
not supported
not supported
Self-Refresh,
t
none / ECC
SPD Entry
ccd
1, 2, 4 & 8
SDRAM
10.0 ns
15.6 µs
n/a / x8
10.0 ns
64 / 72
6.0 ns
LVTTL
20 ns
Value
6.0 ns
16 ns
= 1 CLK
1 / 2
& 3
128
256
reg.
16
12
10
x8
0
4
16Mx64
40
00
00
-8
HYS 64/72V16300/32220GU
01
16Mx72
48
02
08
-8
Hex
0C
0A
A0
0F
0E
A0
FF
FF
80
08
04
00
01
60
80
08
01
04
06
01
01
00
60
14
10
32Mx64
SDRAM-Modules
40
00
00
-8
02
32Mx72
48
02
08
-8
9.01