HYS64V16300GU Infineon, HYS64V16300GU Datasheet

no-image

HYS64V16300GU

Manufacturer Part Number
HYS64V16300GU
Description
3.3 V 16M x 64/72-Bit 1 Bank 128MByte SDRAM Module 3.3 V 32M x 64/72-Bit 2 Bank 256MByte SDRAM Module 168-Pin Unbuffered DIMM Modules
Manufacturer
Infineon
Datasheet
3.3 V 16M x 64/72-Bit 1 Bank 128MByte SDRAM Module
3.3 V 32M x 64/72-Bit 2 Bank 256MByte SDRAM Module
168-Pin Unbuffered DIMM Modules
• 168-Pin unbuffered 8-Byte Dual-In-Line
• PC100-222, PC133-333 and PC133-222
• 1 bank 16M
• Optimized for byte-write non-parity (x64) or
• JEDEC standard Synchronous DRAMs
• Fully PC board layout compatible to INTEL’s
• SDRAM Performance:
Description
The HYS 64(72)V16300GU and HYS 64(72)V32220GU are industry-standard 168-pin 8-byte Dual
In-line Memory Modules (DIMMs) which are organized as 16M
32M
Synchronous DRAMs (SDRAMs) for non-parity and ECC applications. The DIMMs use -7 speed
sorted 16M
speed sorted for PC133-333 and use -8 components for the standard PC100-222 applications.
Decoupling capacitors are mounted on the PC board. The PC board design is in accordance with
INTEL’s Module Specification. The DIMMs have Serial Presence Detect, implemented with a serial
E
and the second 128 bytes are available to the end user. All INFINEON 168-pin DIMMs provide a
high performance, flexible 8-byte interface in a 133.35 mm long footprint, with 1.25“ (31.75 mm)
height.
INFINEON Technologies
2
PROM using the two-pin I
SDRAM Modules for PC main memory
applications
versions
32M
ECC (x72) applications
(SDRAM)
Rev. 1.0 Module Specification
f
t
CK
AC
64 and 32M
Max. Clock
Frequency
Clock Access
Time
64, 32M
8 SDRAM devices in TSOP54 packages to meet the PC133-222 requirements, -7.5
64, 16M
72 organzation
72 in two banks of high-speed memory arrays designed with 128Mbit
-7 /-7.5
PC133
133
5.4
72 and 2 bank
2
C protocol. The first 128 bytes are utilized by the DIMM manufacturer
-8
PC100
100
6
Unit
MHz
ns
1
• Programmed Latencies:
• Single +3.3 V( 0.3 V) Power Supply
• Programmable CAS Latency, Burst Length,
• Auto-Refresh (CBR) and Self-Refresh
• Decoupling capacitors mounted on substrate
• All inputs and outputs are LVTTL compatible
• Serial Presence Detect with E
• Utilizes 16M
• 133.35 mm
Product Speed
-7
-7.5
-8
and Wrap Sequence
(Sequential and Interleave)
packages with 4096 refresh cycles every
64 ms
with gold-contact pads
(JEDEC MO-161-BA)
HYS 64/72V16300/32220GU
PC133-222
PC133-333
PC100-222
31.75 mm
8 SDRAMs in TSOPII-54
64, 16M
SDRAM-Modules
CL
2
3
2
4,00 mm card size
72 in 1 bank and
2
PROM
t
2
3
2
RCD
t
2
3
2
RP
9.01

Related parts for HYS64V16300GU

HYS64V16300GU Summary of contents

Page 1

... INTEL’s Module Specification. The DIMMs have Serial Presence Detect, implemented with a serial 2 E PROM using the two-pin I and the second 128 bytes are available to the end user. All INFINEON 168-pin DIMMs provide a high performance, flexible 8-byte interface in a 133.35 mm long footprint, with 1.25“ (31.75 mm) height. INFINEON Technologies • ...

Page 2

... HYS 72V32220GU-8-C2 Note: All part numbers end with a place code, designating the die revision. Consult factory for current revision. Example: HYS 64V16300GU-8-C2, indicates that Rev.C2 dies are used for SDRAM components. INFINEON Technologies Code Package PC133-222-520 L-DIM-168-33 133 Mhz 16M PC100-222-620 L-DIM-168-33 100 MHz 16M ...

Page 3

... DQ6 51 10 DQ7 52 11 DQ8 DQ9 55 14 DQ10 56 15 DQ11 57 INFINEON Technologies WE Read/Write Input CKE0, CKE1 *) Clock Enable CLK0 - CLK3 Clock Input DQMB0 - DQMB7 Data Mask Chip Select V Power (+3 Rows Columns Bank Select ...

Page 4

... A10 80 39 BA1 CLK0 84 Note: Pin names in parentheses are for the x72 ECC versions; example: Pin 106 = (CB5). INFINEON Technologies Symbol PIN# Symbol DQ19 100 DQ44 V 101 DQ45 DD DQ20 102 V DD N.C. 103 DQ46 DU 104 DQ47 ...

Page 5

... V CC C0-C15, (C16, C17 RAS CAS CKE0 Note only used in the x72 ECC version and all resistor values are 10 Ohm except otherwise noted. Block Diagram for 16M x 64/72 SDRAM DIMM Modules (HYS 64/72V16300GU) INFINEON Technologies WE DQMB4 DQ(39:32 DQMB5 DQ(47:40 ...

Page 6

... V SS RAS, CAS, WE CKE0 CKE1 Note: D16 & D17 is only used in the x72 ECC version and all resistor values are 10 except otherwise noted. Block Diagram for 32M x 64/72 SDRAM DIMM Modules (HYS 64/72V32220GU) INFINEON Technologies CS DQM DQMB4 DQ0-DQ7 DQ(39:32 DQM ...

Page 7

... A11, BA0, BA1, RAS, CAS, WE) Input Capacitance (CS0 - CS3) Input Capacitance (CLK0 - CLK3) Input Capacitance (CKE0, CKE1) Input Capacitance (DQMB0 - DQMB7) Input/Output Capacitance (DQ0 - DQ63, CB0 - CB7) Input Capacitance (SCL, SA0-2) Input/Output Capacitance INFINEON Technologies Symbol IN, OUT V DD ...

Page 8

... All values are shown per memory component These parameters are measured with continuous data stream during read access and all DQ toggling and assumed and the data-out current is excluded INFINEON Technologies HYS 64/72V16300/32220GU Test Symbol -7 /7.5 -8 Condition – ...

Page 9

... Power Down Mode Exit Setup Time Mode Register Setup Time Transition Time (rise and fall) Common Parameters RAS to CAS Delay Precharge Time Active Command Period Cycle Time Bank-to-Bank Delay Time INFINEON Technologies t = 3 Symbol Limit Values -7 PC133-222 min. ...

Page 10

... Self-Refresh Exit Time Read Cycle Data Out Hold Time Data Out to Low Impedance Data Out to High Impedance DQM Data Out Disable Latency Write Cycle Data Input to Precharge (write recovery) DQM Write Mask Latency INFINEON Technologies 3 3 Symbol Limit Values -7 PC133-222 min ...

Page 11

... OUTPUT A Serial Presence Detect storage device—E module configuration, speed, etc. is written into the E 2 Presence Detect protocol (I C synchronous 2-wire bus). INFINEON Technologies V = 2.4 V with the timing referenced to the 1.4 V crossover IH V and – 0.5) ns must be added to this parameter – ...

Page 12

... Max. data access time from Clock for CL=2 25 Minimum Clock Cycle Time Maximum Data Access Time from Clock at CL=1 27 Minimum Row Precharge Time 28 Minimum Row Active to Row Active delay tRRD INFINEON Technologies HYS 64/72V16300/32220GU SPD Entry Value 16Mx64 16Mx72 -7 -7 128 256 SDRAM ...

Page 13

... Superset information (may be used in future) 62 SPD Revision 63 Checksum for bytes 64- Manufacturers information 125 126 Frequency Specification 127 Support Details 128+ Unused storage locations INFINEON Technologies HYS 64/72V16300/32220GU SPD Entry Value 16Mx64 16Mx72 - 128 MByte 1.5 ns 0.8 ns 1.5 ns 0.8 ns Revision 1 ...

Page 14

... Max. data access time from Clock for CL=2 25 Minimum Clock Cycle Time Maximum Data Access Time from Clock at CL=1 27 Minimum Row Precharge Time 28 Minimum Row Active to Row Active delay tRRD INFINEON Technologies HYS 64/72V16300/32220GU SPD Entry Value 16Mx64 16Mx72 -7.5 -7.5 128 256 SDRAM ...

Page 15

... Superset information (may be used in future) 62 SPD Revision 63 Checksum for bytes 64- Manufacturers information 125 126 Frequency Specification 127 Support Details 128+ Unused storage locations INFINEON Technologies HYS 64/72V16300/32220GU SPD Entry Value 16Mx64 16Mx72 -7.5 -7 128 MByte 1.5 ns 0.8 ns 1.5 ns 0.8 ns Revision 1.2 ...

Page 16

... Max. data access time from Clock for CL=2 25 Minimum Clock Cycle Time Maximum Data Access Time from Clock at CL=1 27 Minimum Row Precharge Time 28 Minimum Row Active to Row Active delay tRRD INFINEON Technologies HYS 64/72V16300/32220GU SPD Entry Value 16Mx64 16Mx72 -8 -8 128 256 SDRAM ...

Page 17

... Superset information (may be used in future) 62 SPD Revision 63 Checksum for bytes 64- Manufacturers information 125 126 Frequency Specification 127 Support Details 128+ Unused storage locations INFINEON Technologies HYS 64/72V16300/32220GU SPD Entry Value 16Mx64 16Mx72 - 128 MByte Revision 1 ...

Page 18

... Package Outlines L-DIM-168-30 (JEDEC MO-161-BA) SDRAM DIMM Module Package 1. min. Detail of Contacts 1.27 INFINEON Technologies + 0.15 133.35 - 127. 6.35 6.35 42. 1.27 = 115. 124 125 *) 1 Note: All tolerances according to JEDEC standard 18 HYS 64/72V16300/32220GU SDRAM-Modules 4 max 0.1 - 1.27 168 ECC modules only L-DIM-168-30 ...

Page 19

... Package Outlines L-DIM-168-33 (JEDEC MO-161-BA) SDRAM DIMM Module Package HYS 64/72V16300GU 1. min. Detail of Contacts 1.27 INFINEON Technologies + 0.15 133.35 - 127. 6.35 6.35 42. 1.27 = 115. 124 125 1 Note: All tolerances according to JEDEC standard 19 HYS 64/72V16300/32220GU SDRAM-Modules 3 max. 84 1.27 + 0.1 - 168 ECC modules only L-DIM-168-33 9 ...

Page 20

... Some timing parameters adjusted according to INTELs PC133 specification Feb. 23, 2000 10.5.2000 21.8.2000 06.09.2001 INFINEON Technologies Explanation for factory specific code in part numbers added Byte 22 for PC100 modules changed from PC133 spec incorpoated SPD tables added Byte 126 changed to 64h for PC133 modules ...

Related keywords