HYS64-74V8200GU Siemens, HYS64-74V8200GU Datasheet - Page 8
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HYS64-74V8200GU
Manufacturer Part Number
HYS64-74V8200GU
Description
3.3 V 8M x 64/72-Bit 1 Bank SDRAM Module 3.3 V 16M x 64/72-Bit 2 Bank SDRAM Module
Manufacturer
Siemens
Datasheet
1.HYS64-74V8200GU.pdf
(17 pages)
Operating Currents
T
Recommended Operating Conditions unless otherwise noted
Parameter & Test Condition
Operating Current
t
Outputs open Burst length = 4, CL = 3
All banks operated in random access,
all banks operated in ping-pong manner to maximize
gapless data access
Precharged Standby Current in
Power Down Mode
CS =
Precharged Standby Current in
Non-power Down Mode
CS =
No operating current
t
active state (max. 4 banks)
Burst operating current
t
Read command cycling
Auto refresh current
t
Auto Refresh command cycling
Self refresh current
Self Refresh Mode, CKE = 0.2 V
Semiconductor Group
RC
CK
CK
CK
A
= 0 to 70 C,
= min., CS =
= min.,
= min.,
t
V
V
RC(MIN.)
IH(MIN.)
IH(MIN.)
,
, CKE
, CKE
t
CK
V
V
DD
IH(MIN.)
t
CK(MIN.)
= 3.3 V
V
V
IL(MAX.)
IH(MIN.)
,
0.3 V
t
t
t
t
CKE
CKE
–
–
standard version
1
CK
CK
CK
CK
=
= infinity
=
= infinity
min.
min.
V
V
IL(MAX.)
IH(MIN.)
8
Symb.
I
I
I
I
I
I
I
I
HYS 64(72)V8200/16220GU-8/-10
I
I
CC1
CC2P
CC2N
CC3N
CC3P
CC4
CC5
CC6
CC2PS
CC2NS
-8/-8B -10
110
2
1
35
5
45
8
70
130
1
max.
75
2
1
30
5
40
8
50
90
1
SDRAM Modules
Unit
mA
mA
mA
mA
mA
mA
mA
mA
mA
1998-08-01
Note
1
1
1
1
1
1
1
1, 2
1
1