HI-8686 Holt Integrated Circuits, HI-8686 Datasheet
HI-8686
Related parts for HI-8686
HI-8686 Summary of contents
Page 1
... CMOS technology. Both products incorporate the digital logic and analog line receiver circuitry in a single device. The receivers on the HI-8685 and the HI-8686 connect directly to the ARINC 429 Bus and translate the incoming signals to normal CMOS levels. Internal comparator levels are set just below the standard 6 ...
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... ENB high) RINA/RINA-10 INPUT Positive direct ARINC serial data input RINB/RINB-10 INPUT Negative direct ARINC serial data input (both RINB and RINB-10 on HI-8686) RESET INPUT Internal logic states are initialized with a low level TESTA INPUT Used in conjunction with the TESTB input to bypass the built-in analog line ...
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... ARINC 561 data, clock and sync with external logic. DATABUS BIT PERIOD TYPE ( s) 429 10 429 69 - 133 575 69 - 133 561 69 - 133 HI-8685, HI-8686 CLK PARITY DETECT RXA CLOCK & DATA DATA RXB DETECT BIT COUNT GAP DETECT Figure 1 ...
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... RINA (-10) -1.50V to +1.50V -3.25V to -6.50V +3.25V to +6.50V don't care HI-8685, HI-8686 Read Byte 1st Byte 1 2nd Byte 2 FIGURE 2. ORDER OF RECEIVED DATA RESET A low on the internal logic. When mains in the initialized state until the first word gap is de- tected preventing reception of a partial word ...
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... FIGURE 3 - RECEIVER INPUT TIMING FOR ARINC 429 TESTA TESTB DERIVED DATA DERIVED CLOCK FIGURE 4 - TEST INPUT TIMING FOR ARINC 429 DERIVED DATA 32nd ARINC bit DATA RDY READ D0 - D15 FIGURE 5 - RECEIVER PARALLEL DATABUS TIMING HI-8685, HI-8686 ARINC Data Bits ARINC Data Bits ...
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... Input resistance RINA (-10) to RINB(-10) RINA (-10) or RINB(-10) to GND or V Input capacitance (Guaranteed but not tested) differential to GND HI-8685, HI-8686 RECOMMENDED OPERATING CONDITIONS Supply Voltages V .................................................+5V CC Temperature Range Industrial Screening .............. -40°C to +85°C Hi-Temp Screening .............. -55°C to +125°C Military Screening..................-55° ...
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... READ pulse width Data delay from READ READ to data floating READ to DATA RDY clear READ pulse to next READ pulse GAPCLK frequency 32nd ARINC bit to DATA RDY HI-8685, HI-8686 SYMBOL TEST CONDITIONS READ , PARITY ENA, TESTA & TESTB 5. ...
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... PIN PLASTIC SOIC - WB HI-8686PQI 32 PIN PLASTIC TQFP HI-8686PQT 32 PIN PLASTIC TQFP HI-8685PJI-10 28 PIN PLASTIC PLCC HI-8685PJT-10 28 PIN PLASTIC PLCC HI-8685PSI-10 28 PIN PLASTIC SOIC - WB HI-8685PST-10 28 PIN PLASTIC SOIC - WB Legend Wide Body HI-8685, HI-8686 D12 TESTB 5 25 D11 RESET HI-8685PJI ...
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... Body) .7055 ± .0045 (17.920 ± .114) .4065 ± .0125 (10.325 ± .318) .050 TYP (1.27) HI-8685, HI-8686 PACKAGE DIMENSIONS PIN NO. 1 IDENT .026 ± .003 x 30° (.660 ± .076 x 30°) .454 ± .002 (11.532 ± .051) SQ. SEE DETAIL A .010 ± ...
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... PIN PLASTIC THIN QUAD FLAT PACK (TQFP) .3543 BSC SQ. (9.00 BSC See Detail A .063 MAX. (1.60 MAX. HI-8685, HI-8686 PACKAGE DIMENSIONS .00057 .00022 (0.0145 .0055 .2755 BSC SQ. (7.00 BSC) .0551 .002 (1.4 .05) .0031 R MIN. .0039 .002 (0.08 R MIN.) (0.10 .05 HOLT INTEGRATED CIRCUITS 10 inches (millimeters) Package Type: 32PTQS ...