hi-6010 Holt Integrated Circuits, Inc., hi-6010 Datasheet
hi-6010
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hi-6010 Summary of contents
Page 1
... Error flags are generated for transmitter underwrites and for receiver data framing miscues, parity errors, and buffer overwrites. The HI-6010 volt chip that will require data transla- tion from and to the ARINC bus. The HI-8482 and HI-8588 line receivers are available for the receiver side and the HI-318X and HI-858X line drivers are available for the transmitter side ...
Page 2
... Either both are operational or neither. HARDWARE CONTROL OF THE RECEIVER PIN 2 - WEF WEF is an error indicator. It goes high for a transmitter "underwrite" (failure to keep up with byte loading) and pin 2 HI-6010 DESCRIPTION 0.0 Volts Error indication if high. Status register must be read to determine specific error. Enables data transmission when low. ...
Page 3
... In 8 bit mode, this pin flags the first character (byte) received bit mode, this pin goes high for a valid 32 bit word. The pin is not affected by CR3 programming. HI-6010 PIN 14 - RXD0 and PIN 16 - RXD1 These pins must be 5 volt logic levels. There must be a translator between the ARINC bus and these inputs ...
Page 4
... HI-3182, HI-3183, HI-8585 or HI-8586 is connected to these pins to translate the 5 volt levels to the proper ARINC bus levels. Data is not output when the HI-6010 is in self-test mode. SOFTWARE CONTROL OF THE TRANSMITTER By writing into the Control Register and reading the Status Register, the controlling processor can operate the transmitter independent of the flags at the pins ...
Page 5
... D32 TD31 TD30 TD29 TD28 TD27 TD26 TD25 * With Pin 5 low, Control Register Bit 5 selects if the 32nd bit is either odd parity or data. * With Pin 5 low, Control Register Bit 5 selects if the 32nd bit is either odd parity or data Pulse P = Pulse X = Don't Care X = Don't Care HI-6010 ...
Page 6
... PAR RD31 RD30 RD29 RD28 RD27 RD26 RD25 P = Pulse P = Pulse X = Don't Care X = Don't Care HI-6010 Write CR Await Pin 8 or Pin High ...
Page 7
... D31 TD30 TD29 TD28 TD27 TD26 TD25 Pulse P = Pulse X = Don't Care X = Don't Care HI-6010 Load Control Word & Load Data to Transmit - Byte 1 ...
Page 8
... 7L7 7L6 7L5 7L4 7L3 8L7 8L6 8L5 8L4 8L3 P = Pulse P = Pulse X = Don't Care X = Don't Care HI-6010 LOADING LABELS Control Bit 7 Must Be 0 First ...
Page 9
... CDS DATA VALID BUS t CSSR CS Figure 1. TRANSMTTER OPERATION CTS t CTL t CPW TXE t ENDAT TXD0/ FIRST TXD1 BIT TXRDY Figure 3. HI-6010 DATA BUS TIMING - WRITE C/D t CDH DATA BUS t CSHR CS t DTX LAST t BIT TXRY HOLT INTEGRATED CIRCUITS 9 VALID CDH ...
Page 10
... Delay TXRDn from CTS Delay TXRDY from last TXDn Delay TXE from last TXDn CTS pulse width RECEIVER TIMING (See Figure 4.) Delay Last RXDn to RXRDY MR pulse width HI-6010 -0.5V to +7.0V Power Dissipation Operating Temperature Range: -0. +0.5V DD +10mA Storage Temperature Range: +25mA Lead Temperature ...
Page 11
... Blank T M-01 PART NUMBER 6010C HI - 6010J x x PART NUMBER Blank F PART NUMBER Blank T PART NUMBER 6010J HI-6010 TEMPERATURE BURN RANGE FLOW IN -40°C TO +85° -55°C TO +125° -55°C TO +125°C M Yes PACKAGE DESCRIPTION 28 PIN CERAMIC SIDE BRAZED DIP (28C) ...
Page 12
... SQ. .173 ±.008 (4.394 ±.203) BSC = “Basic Spacing between Centers” is theoretical true position dimension and has no tolerance. (JEDEC Standard 95) HI-6010 PACKAGE DIMENSIONS 1.400 ±.014 (35.560 ±.356) .595 ±.010 (15.113 ±.254) .050 typ (1.270) .085 ± ...