AM79C972BKCW Advanced Micro Devices, AM79C972BKCW Datasheet - Page 130

• Manufacturer Part Number: AM79C972BKCW
• Description: PCnet-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support
• Manufacturer: Advanced Micro Devices

CSR61: Previous Transmit Descriptor Address
Upper
Bit
31-16 RES
15-0
CSR62: Previous Transmit Byte Count
Bit
31-16 RES
15-12 RES
11-0
130
SWSTYLE
All Other
PXDAU
PXBC
Name
Name
[7:0]
00h
01h
02h
03h
Reserved locations. Written as
zeros and read as undefined.
Contains the upper 16 bits of the
previous transmit descriptor ad-
dress pointer. The Am79C972
controller has the capability to
stack multiple transmit frames.
Read/Write accessible only when
either the STOP or the SPND bit
is set. These bits are unaffected
by H_RESET, S_RESET, or
STOP.
Reserved locations. Written as
zeros and read as undefined.
Reserved locations.
Previous Transmit Byte Count.
This field is a copy of the BCNT
field of TMD1 of the previous
transmit descriptor.
Read/Write accessible only when
either the STOP or the SPND bit
is set. These bits are unaffected
by H_RESET, S_RESET, or
STOP.
Description
Description
LANCE/
PCnet-ISA
controller
RES
PCnet-PCI
controller
PCnet-PCI
controller
Reserved
Name
Style
Table 22. Software Styles
Undefined
SSIZE32
Am79C972
0
1
1
1
CSR63: Previous Transmit Status
Bit
31-16 RES
15-0
CSR64: Next Transmit Buffer Address Lower
Bit
31-16 RES
15-0
16-bit software structures,
non-burst or burst access
RES
32-bit software structures,
non-burst or burst access
32-bit software structures,
non-burst or burst access
Undefined
Initialization Block
Name
PXST
NXBAL
Name
Entries
Description
Reserved locations. Written as
Previous Transmit Status. This
Reserved locations. Written as
zeros and read as undefined.
field is a copy of bits 31-16 of
TMD1 of the previous transmit
descriptor.
Read/Write accessible only when
either the STOP or the SPND bit
is set. These bits are unaffected
by H_RESET, S_RESET, or
STOP.
zeros and read as undefined.
Contains the lower 16 bits of the
next transmit buffer address from
which the Am79C972 controller
will transmit an outgoing frame.
Read/Write accessible only when
either the STOP or the SPND bit
is set. These bits are unaffected
by H_RESET, S_RESET, or
STOP.
Description
16-bit software structures,
non-burst access only
RES
32-bit software structures,
non-burst access only
32-bit software structures,
non-burst or burst access
Undefined
Descriptor Ring Entries