AM79C971VCW Advanced Micro Devices, AM79C971VCW Datasheet - Page 137

• Manufacturer Part Number: AM79C971VCW
• Description: PCnet-FAST Single-Chip Full-Duplex 10/100 Mbps Ethernet Controller for PCI Local Bus
• Manufacturer: Advanced Micro Devices

CSR42: Current Transmit Byte Count
Bit
31-16
15-12
11-0
CSR43: Current Transmit Status
Bit
31-16 RES
15-0
CSR44: Next Receive Byte Count
Bit
31-16 RES
15-12 RES
11-0
CXST
NRBC
Name
RES
RES
CXBC
Name
Name
Reserved locations. Written as
zeros and read as undefined.
Current Transmit Status. This
field is a copy of bits 31-16 of
TMD1 of the current transmit de-
scriptor.
Reserved locations. Written as
zeros and read as undefined.
Reserved locations. Read and
written as zeros.
Next Receive Byte Count. This
field is a copy of the BCNT field of
RMD1 of the next receive de-
scriptor.
zeros and read as undefined.
written as zeros.
This field is a copy of the BCNT
field of TMD1 of the current trans-
mit descriptor.
Read/Write accessible only when
either the STOP or the SPND bit
is set. These bits are unaffected
by H_RESET, S_RESET, or
STOP.
Read/Write accessible only when
either the STOP or the SPND bit
is set. These bits are unaffected
by H_RESET, S_RESET, or
STOP.
Read/Write accessible only when
either the STOP or the SPND bit
is set. These bits are unaffected
by H_RESET, S_RESET, or
STOP.
Description
Reserved locations. Written as
Reserved locations. Read and
Current Transmit Byte Count.
Description
Description
Am79C971
CSR45: Next Receive Status
Bit
31-16 RES
15-0
CSR46: Transmit Poll Time Counter
Bit
31-16 RES
15-0
CSR47: Transmit Polling Interval
Bit
31-16 RES
15-0 TXPOLLINT
NRST
TXPOLL
Name
Name
Name
Reserved locations. Written as
zeros and read as undefined.
Next Receive Status. This field is
a copy of bits 31-16 of RMD1 of
the next receive descriptor.
Read/Write accessible only when
either the STOP or the SPND bit
is set. These bits are unaffected
by H_RESET, S_RESET, or
STOP.
Reserved locations. Written as
zeros and read as undefined.
Transmit Poll Time Counter. This
counter is incremented by the
Am79C971 controller microcode
and is used to trigger the transmit
descriptor ring polling operation
of the Am79C971 controller.
Read/Write accessible only when
either the STOP or the SPND bit
is set. These bits are unaffected
by H_RESET, S_RESET, or
STOP.
Reserved locations. Written as
zeros and read as undefined.
Transmit Polling Interval. This
register contains the time that the
Am79C971 controller will wait be-
tween successive polling opera-
tions. The TXPOLLINT value is
expressed as the two’s comple-
ment of the desired interval,
where each bit of TXPOLLINT
represents 1 clock period of time.
TXPOLLINT[3:0]
(TXPOLLINT[16] is implied to be
a one, so TXPOLLINT[15] is sig-
nificant and does not represent
the sign of the two’s complement
TXPOLLINT value.)
Description
Description
Description
are
ignored.
137