AM7968-125DKC Advanced Micro Devices, AM7968-125DKC Datasheet - Page 76

• Manufacturer Part Number: AM7968-125DKC
• Description: TAXIchip Integrated Circuits(Transparent Asynchronous Xmitter-Receiver Interface)
• Manufacturer: Advanced Micro Devices

Figure 6-1
Figure 6-3
72
AMD
Transmitter and Receiver Decoupling Layouts
Jogs and Glitches in the Clock Line
3. Keep all bypass capacitors as close to the power pins of the device as possible. Lead
4. Use high quality RF grade capacitors such as type COG or X7R. Use of Z5U capaci-
5. Ensure that the power supply does not have more that 100 mV of peak-to-peak noise
6. While CLK can drive four X1 inputs or several TTL loads, the highest performance
Serial Lines
7. Run serial outputs parallel to each other, or one on top of the other at all times and
To further decouple the TAXIchip set, it is highly recommended that ferrite beads be inserted
at locations A, B and D.
C1 = 0.1 F (ceramic)
C2 = 1 F Tantalum
C3 = 0.01 F (ceramic)
lengths should be minimized.
tors is not recommended.
at any of the TAXI Vcc pins. Make this check while the TAXls are sending random
data.
can be achieved by reducing the load on the CLK pin. Care should be taken to en-
sure that no jogs or glitches occur in the CLK signal as shown in Figure 6-3. If pre-
sent, these glitches will be passed onto the PLL and cause an occasional error.
route them away from the Transmitter. Do the same for serial inputs on the Receiver.
Running these serial traces adjacently will minimize noise caused by these extremely
fast signals on other traces. Use of strip lines for serial signals is recommended.
Am7968
CLK or X1
Transmitter
V
(TTL)
V
(ECL)
GND1
V
(CML)
GND2
(CML)
CC1
CC2
CC3
TAXIchip Integrated Circuits Technical Manual
6
5
22 C1
7
21
C1 C3
C1
A
V
CC
Plane
C3
B
Jog or Glitch
Normal Undershoot < 0.5 V
C3
(less than 1/4 )
be very short
Leads must
C2
Normal Overshoot < 0.5 V
Am7969
Receiver
V
(CML)
GND2
GND1
V
(TTL)
CC2
CC1
C1
7
20
8
21
V
C1
CC
C3
12330E-19
12330E-20
D
Plane
C3
C2