MSM9000B-xx OKI electronic componets, MSM9000B-xx Datasheet
MSM9000B-xx
Related parts for MSM9000B-xx
MSM9000B-xx Summary of contents
Page 1
... MSM9000B-xx DOT MATRIX LCD CONTROLLER GENERAL DESCRIPTION The MSM9000B- dot-matrix LCD control driver which has functions of displaying dots) characters (2 lines) and 120-dot arbitrators. The MSM9000B-xx is provided with a 16-dot common driver, 60-dot segment driver, Display Data RAM (DDRAM), and Character Generator ROM (CGROM). ...
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... Crystal OSC XT Circuit 32K/EXT 9D/16D RESET TEST C1-C16 16 Common Driver LCD bias Display Data RAM 8 (DDRAM) (456 Bits) Timing 8 Circuit P/S CS C/D SHT DB7-0 MSM9000B-xx S1-S60 60 Segment Driver 60 Latch 60 Shift Register 5 Character Generator F/F 5 ROM (CGROM) Gate (256 ¥ 5 ¥ 7 Dots) Registers I/O Interface 8 2/38 ...
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... C SHT SO DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 V DD TEST CC1 SS6 V CC2 SS1 V SS2 SS4 V SS5 Pin Configuration Viewed From Pattern MSM9000B-xx COM1 COM8 SEG1 SEG2 SEG59 SEG60 COM16 COM9 3/38 ...
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... Positive + power supply pin for LOGIC 1 — GND pin 4 — Boosted voltage output pins & bias power supply pins 1 — Voltage multiplier output pin (3-/2-fold) 1 — Haver output pin 2 — Voltage multiplier (3-/2-fold) 2 — Voltage multiplier (4-fold) 112 MSM9000B-xx Description 4/38 ...
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... TCP –30 to +85 Condition Range V –V 2 *1, V – 5 SS5 * — –30 to +85 the lowest for the bias voltage. SS5 MSM9000B-xx Unit Applicable pin SS5 + 0.3 V All input pins DD °C — Unit Applicable pin ...
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... O =± — — O Crystal oscillation — 32.768 kHz External clock — kHz During standby — — MSM9000B- 5 –30 to +85°C) BI Max. Unit Applicable pin Other inputs DD 0. 0.2V V Other input pins ...
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... DSW t — DHW t C =50 pF DDR L t — DHR t — WCH t — WCL t — WRE — MSM9000B- =–3 V, Ta=–30 to +85° Max. Unit Applicable pin 1/2A+0 SS1 2 SS2, 3 3/2A+0 SS4 2A+0 SS5 0.26 V — ...
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... — OFF BUSY L t — SHS t — WWL t — WRE — MSM9000B- 5 –30 to +85°C) BI Min. Max. Unit 100 — — ns 100 — — ns 100 — ns 100 — ns 400 — ...
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... IL DB0-7 RESET V — — — WWL AH t WWH t WWRH t WRH t t DSW DHW WRE WCL MSM9000B- WRL t t DDR DHR WCH , 9/38 ...
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... "Z" — — OL RESET V — — — WSHL WSHH t SYS WRE MSM9000B-xx t SAH t SHS WWL BUSY OFF "Z" 10/38 ...
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... Clock input pin to input and output serial interface data. Data input is synchronous with the rising edge of the clock, and the data output is synchronous with the falling edge of the clock. This pin is normally high. When the parallel interface is used, fix this pin to "H" or "L". MSM9000B-xx 11/38 ...
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... Input pins that determine the voltages command. The table below shows the relationships between pin states and contrast adjustment ranges When inputting an external clock Oscillation circuit diagram and V together with contrast adjustment by SS2 SS3 MSM9000B-xx XT External clocks XT OPEN 12/38 ...
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... Contrast adjustment range by command for the charge distribution with SS2 SS2 3 SS2 /2 SS2 3 SS2 3 SS2 3 DD MSM9000B-xx , capacitor and for voltage SS2 3 for charge distribution among 13/38 ...
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... Pins to connect the charge distribution capacitor used for the voltage malitiplier (3-/2-fold). Connect a 0.1 F capacitor between V • CC2 Pins to connect the capacitor for charge distribution to generate LCD bias voltages on the basis Connect a 0.1 F capacitor between V SS2 3 and CC1 and CC2 MSM9000B-xx 14/38 ...
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... Input timing diagram CS C/D DB7-0 WR Output timing diagram CS C/D RD DB7-1 DB0 When C/D="L", RAM display data is output on DB7-0 pins. When C/D="H" and DB7-1="L", busy data is output on DB0 pin. DATA "L" DATA DATA MSM9000B-xx "H" "L" BUSY 15/38 ...
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... Semiconductor I/O Timings on the Serial Interface Input timing diagram CS C/D SHT Output timing diagram CS C/D SHT SO BUSY output, the eight bits after the WR pulse is input are valid MSM9000B- BUSY 16/38 ...
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... This is cancelled by D0="0" 1/0 * Controls blinking of character 1/0 Sets blink patterns of characters chara) if D0="1" chara) if D0="0" Sets arbitrator display lines. MSM9000B-xx *: Don't Care Comments level if DD 17/38 ...
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... ON ON Arbitrator 2 COM2 Arbitrator 1 indicates display data at addresses COM16 32 to 43, while arbitrator 2 indicates display data COM1 at addresses 48 to 59. Arbitrator 2 COM2 Arbitrator 1 indicates display data at addresses 32 to 43, while arbitrator 2 indicates display data COM9 at addresses 48 to 59. COM1 MSM9000B-xx Remarks Remarks Remarks Remarks Remarks 18/38 ...
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... When D0 is "1", addresses (character 2 43, and (arbitrators 1 and 2) are displayed. The command and display data can be set regardless of the bank setting. After RESET = "L" set to "0". Additional function Frequency of source oscillation in the ∏ ∏ ∏ 8 MSM9000B-xx 19/38 ...
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... After RESET = "L", both D4 and D0 are set to "0" that is used as the reference voltage for the LCD SS2 changed, the contrast is changed accordingly Characters 0 OFF OFF MSM9000B-xx level to all DD level is output to all segment and Arbitrators OFF ON ON 20/38 ...
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... When D0 is "1" but the character is a blank, the character does not blink visibly. When D0 is "0", the character does not blink visibly while all its dots are turned on. After RESET = "L" set to "0". [D0 = "1"] MSM9000B-xx [D0 = "0"] 21/38 ...
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... When display data or arbitrator blink data is input or the AINC or CHB command is executed, the address pointer is incremented by one. Character 2 Arbitrator 1 COM10 to 16 COM8 to 14 COM9 to 15 Character 2 Arbitrator 1 COM3 to 9 COM1 to 7 COM2 to 8 MSM9000B-xx Arbitrator 2 COM1 COM2 COM15 COM16 COM16 COM1 Arbitrator 2 COM1 COM2 COM8 ...
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... The setting before standby mode is retained. The count before standby mode is retained. Standby state 10. No change. The setting before standby mode is retained. Both character and arbitrator display mode is set, but the display is turned off. The setting before standby mode is retained. MSM9000B-xx 23/38 ...
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... CG ROM. Input data is displayed as shown below. S5n+1 D4 Dummy data must be set for input data D7 to D5. Either "1" or "0" can be input as input data D5 S5n+5 S: Segment MSM9000B-xx Arbitrator 1 Arbitrator 2 Character 1 Character 2 Arbitrator 1 Arbitrator 2 Character 1 Character 2 24/38 ...
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... DB0 pin when the parallel interface is used. When display data or commands are input consecutively, a wait must be inserted for the source clock cycle multiplied by 10. Another way is to detect busy signals and input data or commands during not-busy time only. ¥ 1 ¥ 448 = 13.66 ms –6 ¥ 1 ¥ MSM9000B-xx 15 · · · · · (3) 25/38 ...
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... Set a mode by the reset input according to specifications. Set the load option. The blank code is written and blinking is released each time AINC is executed. RAM data is cleared. The load option is cleared. The display is turned on. The initial screen is displayed. Set D4 according to the display. MSM9000B-xx 26/38 ...
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... Change the settings after a reset, if necessary. Set the load option. The blank code is written and blinking is disabled each time AINC is executed. RAM data is cleared. The load option is cleared. The display is turned on. The initial screen is displayed. Set D4 according to the display. MSM9000B-xx 27/38 ...
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... Wait until oscillation is stabilized. Wait until voltage multiplier is stabilized. Ordinary operation Confirm not-busy signal. YES Set standby mode. When the code in which D0 is set input, standby mode is canceled regardless of C/D input. The length of the wait depends on the configuration of the oscillation circuit. MSM9000B-xx 28/38 ...
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... C1 C2 C16 Lighting-on = Lighting-off MSM9000B- SS1 V SS2 SS4 ...
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... Semiconductor In 1/9 duty Lighting-on = Lighting-off MSM9000B- SS1 V SS2 SS4 V SS5 SS1 V SS2 SS4 V SS5 SS1 V SS2 SS4 ...
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... MSM9000B-xx 30H : 0 38H : 8 31H : 1 00H : 9 32H : 2 3AH : : 33H : 3 3BH : ; 34H : 4 3CH : < 35H : 5 3DH : = 36H : 6 3EH : > 37H : 7 3FH : ? 31/38 ...
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... Y 61H : a 69H : i 5AH : Z 62H : b 64H : j 5BH : [ 63H : c 6BH : k 5CH : / 64H : d 6CH : I 5DH : ] 65H : e 6DH : m 5EH : ^ 66H : f 6EH : n 5FH : _ 67H : g 6FH : o MSM9000B-xx 78H : x 70H : p 79H : y 71H : q 7AH : z 72H : r 7BH : { 73H : s 7CH : 74H : t 70H : } 75H : u 7EH : ~ 76H : v 7FH : £ 77H : w 32/38 ...
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... A2H : AAH : 9BH : § A3H : ABH : 9CH : ° A4H : aCH : 9DH : ¨ A5H : ADH : 9EH : º A6H : AEH : 9FH : ¢ 27H : 2FH : MSM9000B-xx B0H : — B8H : B1H : B9H : B2H : BAH : B3H : BBH : B4H : BCH : B5H : BDH : B6H : BEH : 37H : 3FH : 33/38 ...
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... D2H : DAH : E2H : D3H : DBH : E3H : D4H : DCH : E4H : D5H : DDH : E5H : E6H : Æ D6H : DEH : E7H : ¨ D7H : DFH : ° MSM9000B-xx E8H : ≠ FØ F8H : e E9H : Ø F1H : F9H : l F2H : q FAH : p EAH : F3H : X FBH : s EBH : F4H : S ECH : FCH : ü F5H : F ...
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... C16 DD V SS1 V , SS2 3 V SS4 V SS5 MSM9000B- CC1 CC2 SS6 V SS OPEN 8 MSM9000B-xx 60 Segment drivers S60 32.768 kHz 32K/EXT 9D/16D P/S 100 kW RESET 1 mF TEST 35/ ...
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... PORT dot characters x 12 characters x 1 line LCD Panel 60 symbols x 2 lines OPEN 9 Segment common 7 drivers drivers C10 to C16 S1 to S60 , 3 MSM9000B-xx 8 OPEN MSM9000B- kHz External Clock XT OPEN 32K/EXT 9D/16D P/S 100 kW RESET 1 mF TEST ...
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... MSM9000B- Pad Name X (µm) Y (µm) V 1487 –1508 CC1 V 1662 –1508 C1 V 1837 –1508 SH V 2012 –1508 SS6 V 2194 –1375 CC2 ...
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... MSM9000B-xx Pad Name X (µm) Y (µm) SEG18 –1337 1508 SEG17 –1444 1508 SEG16 –1552 1508 SEG15 –1659 1508 SEG14 –1765 1508 SEG13 – ...