ispPAC10-01PI Lattice Semiconductor, ispPAC10-01PI Datasheet - Page 13

• Manufacturer Part Number: ispPAC10-01PI
• Description: In-System Programmable Analog Circuit
• Manufacturer: Lattice Semiconductor

this term is eliminated. The level of attainable attenuation
is as low as 1/11 (-20.8dB) with R
1/10 (-20dB) with R
When configuring a PACblock to attenuate, it is neces-
sary to increase the value of feedback capacitance to
maintain stability. Increasing feedback capacitance has
the same beneficial effect as for a discrete op amp: It
increases the network’s phase margin which assists in
maintaining stability.
Using VREF
The VREF
buffered when used as a reference. A PACblock can be
made into a VREF
PACblock inputs are left unconnected and the feedback
closed. In this condition the input amplifiers are tied to
VREF
forced to VREF
VREF
drive capabilities of any ispPAC10 output. However, do
not short the two outputs together. There is a small
potential difference between them which will cause a
steady state current to flow, thus needlessly dissipating
power.
Figure 9. PACblock as VREF
It is not always necessary to buffer the VREF
If it is used to reference a high impedance source, i.e.,
one that does not require more than 10 A, then it can be
directly connected. An example is shifting the DC level of
a signal connected to the input of a PACblock. In this
case, the signal is AC coupled and “terminated” in
VREF
Referring to Figure 10b, if R
the VREF
Theory of Operation (Continued)
OUT1=2.5V
OUT1
OUT
OUT
OUT
IN1
OUT
through a minimum total resistance of 100k .
OUT
voltage source. This reference has the same
and the output amplifier’s outputs are thus
pin may be used without buffering.
output is high impedance and it should be
OUT
OUT
OUT
Unconnected
F
disabled.
or 2.5V. Either output is now a
buffer as shown in Figure 9. The
IA1
IA2
-1
1
IN
is greater than 200k then
OUT
PACblock 1
Buffer
F
enabled or
OUT
OA1
1.07pF
2.5V
output.
13
Interfacing
When used in a single-supply system where the system
common mode voltage is near V
directly connected to the ispPAC10 input. If the input
signal does not have such a DC bias, then one needs to
be added to the signal in order to accommodate the input
requirements for the ispPAC10. A DC coupled bias can
be added to a signal by using a voltage divider circuit as
shown for one-half of the differential input in Figure 10a.
Normally the choice for the reference DC voltage is the
supply voltage, but other values may be used if neces-
sary (and available).
Figure 10a. DC Biasing an Input Signal
Where DC coupling is not required, the input signal may
be AC coupled as shown in Figure 10b. This circuit forms
a high pass filter with a cutoff frequency of 1/(2 RC) and
adds the necessary DC bias to the signal to accommo-
date the ispPAC10 input requirements. The DC reference
should equal V
The minimum resistance when using the VREF
circuit of Figure 9 is 600 ; when using the VREF
output pin it is 200k
*Single-Ended V
*Differential V
V
Connect to VREF
other DC Reference.
Duplicate Vin+ Network
on Vin-.
SE
Specifications ispPAC10
R
SE
V
1
VREF
IN
R
:
SE
S
2
+
:
OUT
/2, making VREF
*
=
OUT
V
or
R
V
SE
V
1
IN+
IN-
(as discussed earlier).
+
R
R
2
2
+
VREF
R
OUT
1
S
OUT
+
/2, signals may be
the natural choice.
R
2
R
1
OUT
buffer
OUT