X40010 Xicor, X40010 Datasheet - Page 5

• Manufacturer Part Number: X40010
• Description: Dual Voltage Monitor with Integrated CPU Supervisor
• Manufacturer: Xicor

X40010/X40011/X40014/X40015 – Preliminary
Setting a Lower V
In order to set V
present value, then V
ing to the procedure described below. Once V
has been “reset”, then V
voltage using the procedure described in “Setting a
Higher V
Resetting the V
To reset a V
age (Vp) to the WDO pin before a START condition is
set up on SDA. Next, issue on the SDA pin the Slave
Address A0h followed by the Byte Address 03h for
V
Data Byte in order to reset V
lowing a valid write operation initiates the programming
sequence. Pin WDO must then be brought LOW to
complete the operation.
After being reset, the value of V
nal value of 1.7V or lesser.
Note: This operation does not corrupt the memory
array.
CONTROL REGISTER
The Control Register provides the user a mechanism
for changing the Block Lock and Watchdog Timer set-
tings. The Block Lock and Watchdog Timer bits are
nonvolatile and do not change when power is removed.
Figure 4. Sample V
REV 1.3.4 7/12/02
TRIP1
V
Adj.
TRIP1
and 0Bh for V
TRIPx
TRIPx
Voltage”.
TRIPx
voltage, apply the programming volt-
TRIPx
TRIPx
TRIP
V
TRIPx
Adj.
TRIP2
Voltage
TRIP2
TRIPx
Voltage (x=1, 2)
to a lower voltage than the
Reset Circuit
must first be “reset” accord-
V2FAIL
, followed by 00h for the
can be set to the desired
TRIPx
TRIPx
RESET
4.7K
. The STOP bit fol-
becomes a nomi-
www.xicor.com
TRIPx
1
3
2
4
X4001x
SOIC
The Control Register is accessed with a special pre-
amble in the slave byte (1011) and is located at
address 1FFh. It can only be modified by performing a
byte write operation directly to the address of the regis-
ter and only one data byte is allowed for each register
write operation. Prior to writing to the Control Register,
the WEL and RWEL bits must be set using a two step
process, with the whole sequence requiring 3 steps.
See "Writing to the Control Registers" on page 7.
The user must issue a stop, after sending this byte to
the register, to initiate the nonvolatile cycle that stores
WD1, WD0, PUP1, PUP0, BP1, and BP0. The X40010/
11/14/15 will not acknowledge any data bytes written
after the first byte is entered.
The state of the Control Register can be read at any
time by performing a random read at address 01Fh,
using the special preamble. Only one byte is read by
each register read operation. The master should sup-
ply a stop condition to be consistent with the bus proto-
col, but a stop is not required to end this operation.
RWEL: Register Write Enable Latch (Volatile)
The RWEL bit must be set to “1” prior to a write to the
Control Register.
PUP1 WD1 WD0
7
7
6
5
8
6
5
Characteristics subject to change without notice.
Adjust
Run
BP
4
V
P
3
0
RWEL WEL PUP0
SCL
SDA
2
µC
1
5 of 25
0